• Title/Summary/Keyword: device structure

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Air Flow Sensor with Corrugation Structure for Low Air Velocity Detection (주름구조를 적용한 저속 유속 센서)

  • Choi, Dae-Keun;Lee, Sang-Hoon
    • Journal of Sensor Science and Technology
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    • v.20 no.6
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    • pp.393-399
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    • 2011
  • In this paper, we designed and fabricated the novel air flow sensor using air drag force, which can be applied to the low air flow detection. To measure the low air flow, we should enlarge the air drag force and the output signal at the given air flow. The paddle structure is applied to the device, and the device is vertically located against the air flow to magnify the air drag force. We also adapt the corrugation structure to improve the output signals on the given air velocity. The device structure is made up of the silicon nitride layer and the output signal is measured with the piezoresistive layer. The output signals from the corrugated device show the better measurement sensitivity and the response time than that of flat one. The repeated measurement also shows the stabilized signals.

Electrical Equivalent modeling of Powder Electroluminescent Device (후막 전계발광소자의 전기적 등가 모델링)

  • 이종찬;박대희
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1998.11a
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    • pp.49-52
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    • 1998
  • In this paper, to implement the electrical equivalent modeling of powder electroluminescent device, capacitate equation of device was chosen. The conventional structure device which have dielectric and phosphor layer between electrodes, and the single emission structure device which means that dielectric and phosphor were mixed between electrodes, were investigated. As a result, it was possible to make the equation that is transferred capacitance to phosphor layer, and using measured brightness efficiency and conductivity of devices was calculated.

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A novel self-aligned offset gated polysilicon thin film transistor without an additional offset mask (오프셋 마스크를 이용하지 않는 새로운 자기 정합 폴리 실리콘 박막 트랜지스터)

  • 민병혁;박철민;한민구
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.32A no.5
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    • pp.54-59
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    • 1995
  • We have proposed a novel self-aligned offset gated polysilicon TFTs device without an offset mask in order to reduce a leakage current and suppress a kink effect. The photolithographic process steps of the new TFTs device are identical to those of conventional non-offset structure TFTs and an additional mask to fabricate an offset structure is not required in our device due to the self-aligned process. The new device has demonstrated a lower leakage current and a better ON/OFF current ratio compared with the conventional non-offset device. The new TFT device also exhibits a considerable reduction of the kink effect because a very thin film TFT devices may be easily fabricated due to the elimination of contact over-etch problem.

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Design of antireflection coationgs on the facets of a multilayered structure waveguide device (다층 구조 도파관 소자 단면에의 무반사 코팅 설계)

  • 김용곤;김부균;주흥로
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.21 no.7
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    • pp.1850-1860
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    • 1996
  • We present the results for the design ofantireflection (AR) coatings on facets of a multilayered structure waveguide device. The method, whose results agree very well with the reusults of the rigorous method in the case of a symmetric three layer structure deveice, is extended for the design of AR coatings on the facets of a multilayered structure waveguide device. the field profile in a multilayered structure waveguide necessary for the use of the extended method is obtained from the transfer matrix method. The virtual four layered structure method (VFLM) is proposed to reduce the time for the design ofAR coatings because the time for the design of AR coatings using the extended method increases as the number of layers increases. The optimum coating parameters and tolerance mapsfor two different six layered waveguide devices in Ref. [9] and [10] are obtained using the extendedmethod and the VFLM,and for the three different cases approximated as three layered waveguide devices to compare the results of each case. The results of the VFLM are similar to those of the extended methodcompared to those of the three layered structure waveguide. The main reason for the above results is that the field profile in the device calculated usingthe VFLM is similar to that calculated using the extended method compared to that for three layered structure wavegjide. We conclude that the extended method or VFLM should be used for the design of AR coatings on facets of a deice required for the facet reflectivity less than 10$^{-3}$ such as a semiconductor otical amplifier.

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2500V IGBTs with Low on Resistance and Faster Switching Characteristic (낮은 온-저항과 빠른 스위칭 특성을 갖는 2500V급 IGBTs)

  • Shin, Samuell;Koo, Yong-Seo;Won, Jong-Il;Kwon, Jong-Ki;Kwak, Jae-Chang
    • Journal of IKEEE
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    • v.12 no.2
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    • pp.110-117
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    • 2008
  • This paper presents a new Insulated Gate Bipolar Transistor(IGBT) based on Non Punch Through(NPT) IGBT structure for power switching device. The proposed structure has adding N+ beside the P-base region of the conventional IGBT structure. The added n+ diffusion of the proposed device ensure device has faster turn-off time and lower forward conduction loss than the conventional IGBT structure. But, added n+ region can reduce th breakdown voltage and latching current density of the proposed device due to its high doping concentration. This problems can be overcome by using diverter on the right side of the device. In the simulation results, turn-off time of the proposed device is 0.3us and the on-state voltage drop is 3V. The results show that the proposed device has superior characteristic than conventional structure.

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Optimal Design of ESD Protection Device with different Channel Blocking Ion Implantation in the NSCR_PPS Device (NSCR_PPS 소자에서 채널차단 이온주입 변화에 따른 최적의 정전기보호소자 설계)

  • Seo, Yong-Jin;Yang, Jun-Won
    • Journal of Satellite, Information and Communications
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    • v.11 no.4
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    • pp.21-26
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    • 2016
  • The ESD(electrostatic discharge) protection performance of PPS(PMOS pass structure) embedded N-type silicon controlled rectifier(NSCR_PPS) device with different implant of channel blocking region was discussed for high voltage I/O applications. A conventional NSCR standard device shows low on-resistance, low snapback holding voltage and low thermal breakdown voltage, which may cause latch-up problem during normal operation. However, our proposed NSCR_PPS devices with modified channel blocking structure demonstrate the improved ESD protection performance as a function of channel implant variation. Therefore, the channel blocking implant was a important parameter. Since the modified device with CPS_PDr+HNF structure satisfied the design window, we confirmed the applicable possibility as a ESD protection device for high voltage operating microchips.

Developing a smart structure using integrated DDA/ISMP and semi-active variable stiffness device

  • Karami, Kaveh;Nagarajaiah, Satish;Amini, Fereidoun
    • Smart Structures and Systems
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    • v.18 no.5
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    • pp.955-982
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    • 2016
  • Recent studies integrating vibration control and structural health monitoring (SHM) use control devices and control algorithms to enable system identification and damage detection. In this study real-time SHM is used to enhance structural vibration control and reduce damage. A newly proposed control algorithm, including integrated real-time SHM and semi-active control strategy, is presented to mitigate both damage and seismic response of the main structure under strong seismic ground motion. The semi-active independently variable stiffness (SAIVS) device is used as semi-active control device in this investigation. The proper stiffness of SAIVS device is obtained using a new developed semi-active control algorithm based on real-time damage tracking of structure by damage detection algorithm based on identified system Markov parameters (DDA/ISMP) method. A three bay five story steel braced frame structure, which is equipped with one SAIVS device at each story, is employed to illustrate the efficiency of the proposed algorithm. The obtained results show that the proposed control algorithm could significantly decrease damage in most parts of the structure. Also, the dynamic response of the structure is effectively reduced by using the proposed control algorithm during four strong earthquakes. In comparison to passive on and off cases, the results demonstrate that the performance of the proposed control algorithm in decreasing both damage and dynamic responses of structure is significantly enhanced than the passive cases. Furthermore, from the energy consumption point of view the maximum and the cumulative control force in the proposed control algorithm is less than the passive-on case, considerably.

Computer Simulation on the Structure and Electrical Characteristics of Power VDMOSFET based on Numerical Analysis (수치해석에 의한 전력용 VDMOSFET의 구조와 전기적 특성에 관한 컴퓨터 시뮬레이션)

  • Park, Bae-Woong;Lee, Woo-Sun
    • Proceedings of the KIEE Conference
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    • 1989.07a
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    • pp.548-551
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    • 1989
  • Two dimensional numerical analysis program of power VDMOSFET structure has been developed. Modeling and analysis on the electrical characteristics of the device are presented These are available for the device structure optimization and physical understanding of the behavior of the device

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New Graphene Electronic Device Structure for High Ion/Ioff Ratio

  • Jeong, Hyeon-Jong
    • Proceedings of the Korean Vacuum Society Conference
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    • 2012.08a
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    • pp.112-112
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    • 2012
  • Graphene has been considered as one of the potential post Si-materials due to its high mobility. [1] However, since graphene is semi-conductor with zero band gap, it is difficult to achieve high Ion/Ioff ratio, one of the most important requirements for commercial devices. There have been many attempts to open its band gap for high Ion/Ioff ratio, but most of them end up lowering the mobility. [2-5] Thus, we proposed and demonstrated a new device structure for graphene transistor based on one of the unique properties of graphene for high Ion/Ioff: using this approach, we were able to achieve the ratio over $10^5$. [6] Our device has several major advantages over previously proposed graphene based electronic devices. Since our device does not alter the given properties of graphene, such as opening the band gap, it has no fundamental issues on mobility degradations. In addition, our device is fully compatible with current Si technology and we were able to fabricate the devices with 6 inch wafer scale with CVD (Chemical Vapor Deposition) grown graphene. In this presentation, we will discuss about the details of our graphene device including the device structure and the detailed understanding of working mechanism. We will present device characteristics including I-V curves with $10^5$ on/off ratio. We will also present the performance of an inverter based on our devices. Finally, we will discuss the current issues and their potential solutions.

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Design and Performance Comparison of Synchronization Preambles for Device-to-Device Communications (단말 간 직접 통신을 위한 효율적인 동기 프리앰블 설계 및 성능비교)

  • Kim, Jong-Hoon;Sung, Ki-Young;Jung, Young-Ho
    • Journal of Satellite, Information and Communications
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    • v.12 no.1
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    • pp.125-131
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    • 2017
  • In this paper, an efficient structure of device-to-device (D2D) synchronization preamble is proposed to meet the enhanced time and frequency synchronization requirements for D2D communication. D2D communication can be applied not only for the cellular communications, but also unmaned aerial vehicle communications and vehicle-to vehicle communication. The proposed preamble structure is transmitting signals at every odd subcarriers, and empty the other subcarriers to minimize the effect of inter-carrier interference. According to the simulation results, the proposed preamble structure provides improved time offset estimation performance, without degrading frequency offset estimation performance compared to the current LTE D2D preamble.