• Title/Summary/Keyword: deadlock

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Development of Verification and Conformance Test Generation of Communication Protocol for Railway Signaling Systems

  • Lee, Jae-Ho;Hwang, Jong-Gyu;Seo, Mi-Seon;Kim, Sung-Un;Park, Gwi-Tae
    • 제어로봇시스템학회:학술대회논문집
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    • 2004.08a
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    • pp.358-362
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    • 2004
  • Verification and testing are complementary techniques that are used to increase the level of confidence in the correct functioning of communication systems as prescribed by their specifications. This paper presents an experience of model checking for a formal railway signaling protocol specified in LTS (Labeled Transition System). This formal approach checks deadlock, livelock and reachability for the state and action to verify whether properties expressed in modal logic are true on specifications. We also propose a formal method for semi-automated test case generation for a railway signaling protocol described in I/O FSM (Input/Output Finite State Machine). This enables the generation of more complete and consistent test sequence for conformance testing. The above functions are implemented by C++ language and included within RSPVTE (Railway Signaling Protocol Verification and Testing Environment).

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Checking liveness in petri nets using synchronic variables

  • Koh, Inseon;DiCesare, Frank
    • 제어로봇시스템학회:학술대회논문집
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    • 1991.10b
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    • pp.1811-1816
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    • 1991
  • In this paper we present how the deviation bound, which is a synchronic variable, can be used for checking liveness in Petri nets. Also, the deviation bound will be applied to detect or avoid deadlock situations and to characterize concurrency against sequential behaviors in automated manufacturing systems. In the current stage, we restrict the applicable domain of these methods to the Petri net structure that can be synthesized by combining common transitions or common places or common paths of Live-and-Bounded circuits.

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Mobile Robot Navigation using Optimized Fuzzy Controller by Genetic Algorithm

  • Zhao, Ran;Lee, Dong Hwan;Lee, Hong Kyu
    • International Journal of Fuzzy Logic and Intelligent Systems
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    • v.15 no.1
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    • pp.12-19
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    • 2015
  • In order to guide the robots move along a collision-free path efficiently and reach the goal position quickly in the unknown multi-obstacle environment, this paper presented the navigation problem of a wheel mobile robot based on proximity sensors by fuzzy logic controller. Then a genetic algorithm was applied to optimize the membership function of input and output variables and the rule base of the fuzzy controller. Here the environment is unknown for the robot and contains various types of obstacles. The robot should detect the surrounding information by its own sensors only. For the special condition of path deadlock problem, a wall following method named angle compensation method was also developed here. The simulation results showed a good performance for navigation problem of mobile robots.

A Design of Petri net-based AIM Supervisory Control System (페트리네트 기반 AIM 관리 제어 시스템의 설계)

  • Kong S.H.;Kim H.R.;Suh I.H.
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 2005.06a
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    • pp.203-206
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    • 2005
  • This paper presents a design experience of supervisory control system for agile and intelligent manufacturing(AIM). For effectively program job instructions, a Petri net-type graphical language is proposed and it can be applied to a various task such as concurrency and synchronization. PGL is consisted of PGL editor, PGL analyzer and PGL translator; PGL editor generates a job instruction program using graphic symbol. PGL analyzer prevents a deadlock or resource allocation of unit cell. PGL translator transfers to adequate sequential job commands of each unit cell.

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Game-based Learning Content Development for Learning Principles of Finding Prime Numbers (소수를 찾는 원리 학습을 위한 게임 기반 학습 콘텐츠 개발)

  • Kim, Han-Tae;Hong, Myoung-Pyo;Choi, Yong-Suk
    • Proceedings of the Korean Information Science Society Conference
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    • 2011.06b
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    • pp.272-275
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    • 2011
  • 본 논문에서는 수학에서 사용하는 소수(Prime number)를 찾는 원리에 대한 학습을 위한 게임 기반 학습(Game based learning) 콘텐츠인 Prime Miner라는 게임을 제안한다. Prime Miner는 게임이 가지고 있는 장점과 소수의 원리를 결합하여 게임을 통해 학습자의 흥미를 이끌어 학습에 몰입할 수 있도록 도우며, 학습자가 게임 규칙을 통해 소수의 원리를 합리적으로 배울 수 있도록 유도한다. 본 논문에서는 Prime Miner의 게임 원리와 학습자가 Prime Miner를 통해 소수 학습을 하는 방법을 설명한다. 또한 퍼즐게임에서 종종 발생하는 더 이상 게임을 진행할 수 없는 상태인 교착상태(Deadlock)를 피하기 위한 숫자 타일의 배치에 관한 방법도 제시한다.

A Study about Finding Optimal Path Using HAS Dynamic Programming (RAS Dynamic Programming을 이용한 최적 경로 탐색에 관한 연구)

  • Kim, Jeong-Tae;Cho, Hyun-Chul;Lee, Kwon-Soon
    • Proceedings of the Korean Institute of Navigation and Port Research Conference
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    • 2007.12a
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    • pp.226-227
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    • 2007
  • Significant increase of container flows in marine terminals requires more efficient automatic port systems. This paper presents a novel routing and collision avoidance algorithm of linear motor based shuttle cars using random access sequence dynamic programming (RAS DP). The proposed RAS DP is accomplished online for determining optimal paths for each shuttle car.

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Design of A Petrinet-based Supervisory Control System (페트리네트 기반 관리 제어시스템의 설계)

  • Kong, Sung-Hak;Suh, Il-Hong
    • The Transactions of the Korean Institute of Electrical Engineers D
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    • v.54 no.8
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    • pp.486-494
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    • 2005
  • This paper presents a design experience of a supervisory control system. For effective programming of job commands, a petri net-type graphical language (PGL) is proposed applied to various tasks having concurrency and synchronization. Our PGL based supervisory control system is composed of PGL editor and PGL compiler; PGL editor is designed to help us to generate a job program using graphical symbols. PGL compiler includes analyzer, scheduler, and tranlator, PGL analyzer prevents a deadlock or resource allocation of unit cell, PGL scheduler generates a adequate job sequence of unit cell. and PGL translator translate the scheduled sequence into the iob program of each unit cell.

Task-Sequencing Design for the FMC Transfer Robot Using Traveling Salesman Problem (외판원 문제(TSP)를 이용한 FMC 반송 로봇의 작업순서 설계)

  • Kim, Woo-Kyun;Lee, Hong-Chul
    • Proceedings of the KAIS Fall Conference
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    • 2009.12a
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    • pp.574-577
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    • 2009
  • 본 논문은 외판원 문제(TSP: Traveling Salesman Problem)를 이용하여 로봇중심의 FMC(Flexible Manufacturing Cell)에서 반송 로봇의 작업순서를 설계하는 방법을 제시하였다. 이를 위해, 먼저 다수의 설비와 반송 로봇으로 구성된 대표적인 로봇 중심의 FMC를 가상으로 설계한 후, 실험계획법을 이용하여 다양한 조건에서의 주요 반응변수들의 인과관계를 규명하였다. 실험결과, 처리량, 반송로봇의가동률, 그리고 Buffer의 평균 대기 작업물의 수가 주요 반응변수들로 선정되었으며, 이를 기반으로 순서기반 조합최적화 문제인 TSP로 로봇 작업순서를 설계하였다. 제안한 방법과 기존의 방법을 비교하기 위해서 시뮬레이션을 수행 한 결과 제안된 TSP 방법이 기존의 방법 보다 반송 로봇의 교착 (Deadlock) 상태를 방지하여 처리량 등 주요 반응변수들 모두를 향상 시키는 결과를 가져왔다. 더불어,이 방법은 본 연구에서 제시한 FMC 뿐 아니라 반도체나 LCD(Liquid Crystal Display) 생산 공정과 같이 반송 로봇에 의해 구성되어 있는 장치 산업분야에 적용가능하다는 측면에서 큰 효과가 기대된다.

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Inter-loop Stocker Automated Material Handling Systems (Inter-loop Stocker 자동 물류시스템)

  • Jo, Min-Ho
    • IE interfaces
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    • v.10 no.1
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    • pp.57-65
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    • 1997
  • Less researches on AGV(Automated Guided Vehicle) path configurations have been conducted so far while more studies have been placed in determining AGV guide path directions and pick-up/drop-off station locations, and routing/dispatching/scheduling strategies. In practice plenty of concerns fall in preventing deadlock and simplifying AGV system control through an appropriate AGV path configuration. In order to meet those requirements, a new AGV path configuration, inter-loop stocker type is introduced here. The stocker serves as relaying material between loops as well as stocking material. Automated material handling systems using AGVs play an important role in semiconductor industry including TFT LCD and memory/non-memory chip. A practical example of implementing the inter-loop stocker concept successfully in the TFT LCD fab is presented in this paper.

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A Genetic Algorithm with a New Repair Process for Solving Multi-stage, Multi-machine, Multi-product Scheduling Problems

  • Pongcharoen, Pupong;Khadwilard, Aphirak;Hicks, Christian
    • Industrial Engineering and Management Systems
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    • v.7 no.3
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    • pp.204-213
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    • 2008
  • Companies that produce capital goods need to schedule the production of products that have complex product structures with components that require many operations on different machines. A feasible schedule must satisfy operation and assembly precedence constraints. It is also important to avoid deadlock situations. In this paper a Genetic Algorithm (GA) has been developed that includes a new repair process that rectifies infeasible schedules that are produced during the evolution process. The algorithm was designed to minimise the combination of earliness and tardiness penalties and took into account finite capacity constraints. Three different sized problems were obtained from a collaborating capital goods company. A design of experimental approach was used to systematically identify that the best genetic operators and GA parameters for each size of problem.