• Microbiology and Biotechnology Letters
• /
• v.32 no.2
• /
• pp.190-194
• /
• 2004

The gene product of dctD (DctD) activates transcription from the dctA promoter regulatory region by the $\sigma^{54}$ -holoenzyme form ofRNA polymerase ($E\sigma^{54}$ ) in Rhizobium meliloti and R. leguminosarum. The Escherichia coli integration host factor (IHF) stimulated DctD-mediated activation from the dctA promoter regulatory region of R. leguminosarum but not R. meliloti. In the absence of UAS, IHF inhibited DctD-mediated activation from both of these promoter regulatory regions. IHF also inhibited activation from R. leguminosarum dctA by nitrogen regulatory protein C (NtrC), another activator of $E\sigma^{54}$ but not by one which lacks a specific binding site in this promoter regulatory region. IHF, however, stimulated NtrC-mediated activation from the R. meliloti dctA promoter. Upon removal of the UAS, IHF inhibited NtrC-mediated transcription activation from the R. meliloti dctA promoter regulatory region. These data suggest that IHF likely faciliates productive contacts between the activators NtrC or DctD and $E\sigma^{54}$ to stimulate activation from dctA promoter.

• The Journal of the Institute of Internet, Broadcasting and Communication
• /
• v.23 no.6
• /
• pp.75-80
• /
• 2023

We show the design of fast invertible block transforms that can replace the DCT in future wireless and portable computing application. This is called binDCT. In binDCT, both the forward and the inverse transforms can be implemented using only binary shift and addition operation. And the binDCT inherits all desirable DCT characteristics such as high coding gain, no DC leakage, symmetric basis functions, and recursive construction. The binDCT also inherits all lifting properties such as fast implementations, invertible integer-to-integer mapping, in-place computation. Thus, this method has advantage of fast implementation for complex DCT calculations. In this paper, we present computation costs and performance analysis between DCT and binDCT using Shapiro's EZW.

• Journal of the Korean Institute of Telematics and Electronics B
• /
• v.31B no.3
• /
• pp.103-114
• /
• 1994

This paper proposes an implementation of DCT (Discrete Cosine Transform) and IDCT (Inverse DCT) using a fast DCT algorithm with shift and addition operations instead of multiplications Based on the proposed algorithm, a new VLSI architecture for the DCT and the IDCT is proposed. It shows modularity , regularity and capability for multiprocessing. Its performance is also simulated by a simulation software, "Compass". The results of the simulation provide the quality of decompression images, the increase in processing speed, representing the superiority of the proposed architecture.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.8 no.2
• /
• pp.352-358
• /
• 2004

This paper is studied the improvement of performance for moving picture encoder using H.263. This is used the new motion vector search algorithm using a relation with neighborhood search point and is applied the integer DCT for the encoder. The integer DCT behaves DCT by the addition operation of the integer using WHT and a integer lifting than conventional DCT that needs the multiplication operation of a floating point number. Therefore, the integer Dn can reduce the operation amount than basis DCT with having an equal PSNR. The new motion vector search algorithm is showed almost similar PSNR as reducing the operation amount than the conventional motion vector search algorithm. To experiment a compatibility of the integer DCT and the conventional DCT, according to result compare case that uses a method only and case that uses the alternate two methods of the integer DCT or the conventional DCT to H.263 encoder and decoder, case that uses the alternate two methods is showed doing not deteriorate PSNR-and being each other compatible visually than case that uses an equal method only.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.29 no.10C
• /
• pp.1484-1489
• /
• 2004

Given a video frame in terms of its 8${\times}$8 block-DCT coefncients, we wish to obtain a downsized or upsized version of this Dame also in terms of 8${\times}$8 block DCT coefficients. The DCT being a linear unitary transform is distributive over matrix multiplication. This fact has been used for downsampling video frames in the DCT domains in Dugad's, Mukherjee's, and Park's methods. The downsampling and upsampling schemes combined together preserve all the low-frequency DCT coefficients of the original image. This implies tremendous savings for coding the difference between the original frame (unsampled image) and its prediction (the upsampled image).This is desirable for many applications based on scalable encoding of video. In this paper, we extend the earlier works to various DCT sizes, when we downsample and then upsample of an image by a factor of two. Through experiment, we could improve the PSM values whenever we increase the DCT block size. However, because the complexity will be also increase, we can say there is a tradeoff. The experiment result would provide important data for developing fast algorithms of compressed-domain image/video resizing.

• 제어로봇시스템학회:학술대회논문집
• /
• 1997.10a
• /
• pp.1383-1386
• /
• 1997

Discrete cosine transform(DCT) is the most popular block transform coding in lossy mode. DCT is close to statistically optimal transform-the Karhunen Loeve transform. In this paper, a module for DCT encoder is made with TMS320C80 based on JPEG and MPEG, which are intermational standards for image compression. the DCT encoder consists of three parts-a transformer, a vector quantizer and an entropy encoder.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.28 no.6C
• /
• pp.602-608
• /
• 2003

In this paper, we propose an efficient DCT calculation method for fast video encoding. We show that the SAD obtained in the motion estimation and compensation process is decomposed into the positive and negative terms. Based on a theoretical analysis, it is shown that the DCT calculation is classified into 4 cases - DCT Skip, Reduced_DCT1 , Reduced_DCT2, and original DCT- according to the positive and negative terms. In the proposed algorithm, one of 4 cases is used for DCT in order to reduce the computational complexity. The simulation results show that the proposed algorithm achieves computational saving approximately 25.2% without image degradation and computational overhead.

• The Journal of Natural Sciences
• /
• v.7
• /
• pp.27-35
• /
• 1995

This paper introduces a VLSI (Very Large Scale Integrated Circuit) implementation of the 2-D Discrete Cosine Transform (DCT) with an application to image and video coding. This implementation, which is based upon a state space model, uses both algorithm and data partitioning to achieve high efficiency. With this implementation, the amount of data transfers between the processing elements (PEs) are reduced and all the data transfers are limitted to be local. This system accepts the input as a progressively scanned data stream which reduces the hardware required for the input data control module. With proper ordering of computations, a matrix transposition between two matrix by matrix multiplications, which is required in many 2-D DCT systems based upon a row-column decomposition, can be also removed. The new implementation scheme makes it feasible to implement a single 2-D DCT VLSI chip which can be easily expanded for a larger 2-D DCT by cascading these chips.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.18 no.12
• /
• pp.1928-1934
• /
• 1993

This paper presents a fast algorithm of integer discrete cosine transform(IDCT) allowing VLSI implementation by integer arithmetic. The proposed fast algorithm has been developed using Chen`s matrix decomposition in DCT, and requires less number of arithmetic operations compared to the IDCT. In the presented algorithm, the number of addition number is the same as the one of Chen`s algorithm if DCT, and the number of multiplication if the same as that in DCT at N=8 but drastically decreasing when N is above 8. In addition, the drawbacks of DCT such as performance degradation at the finite length arithmetic could be overcome by the IDCT.

• Journal of the Korean Institute of Telematics and Electronics C
• /
• v.35C no.5
• /
• pp.25-32
• /
• 1998

In this paper, SA (shape adaptive)-DCT is implemented using a datapath with 4 MACs (multiplication & accumulator). DCT is a well-known bottleneck of real-time video compression using MPEG-like schemes. High-speed pipelined MACs presented here implement real-time DCT. A datapath in this paper executes DCT/IDCT algorithms for QCIF 15fps(frame per second), maximum rate of VLBV(very low bitrte video) in MPEG-4. A 32bit accumulator in a MAC prevents distortion caused by fixed-point process. It can be applied to various operations such as ME (motion estimation) and MC(motion compensation) with a absolutor and a halfer.