• 대한전기학회:학술대회논문집
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• 대한전기학회 2008년도 제39회 하계학술대회
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• pp.136-137
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• 2008

A current transformer(CT) should provide the faithful reproduction of the primary current to the measurement or the protection equipments. The exciting current resulting from the hysteresis characteristics of the core causes an error between the primary current and the secondary current of the CT. A compensating algorithm for the secondary current of the current transformer that removes the effects of the hysteresis characteristics of the iron-core has proposed. The core flux linkage is calculated by integrating the measured secondary current, and then inserted into the flux-magnetizing current curve to obtain the magnetizing current. The exciting current at every sampling interval is obtained by summing the core-loss and magnetizing currents and added to the measured current to obtain the correct current. This paper describes the innovative new product of the iron-cored electronic current transformer. This product composes an iron-cored CT and an intelligent electronic device(IED) ported the compensating algorithm. The test results of the iron-cored electronic current transformers in Korea Electro-technology Research Institute(KERI) are presented.

• 한국해양공학회지
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• 제25권2호
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• pp.120-126
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• 2011

The fatigue damages in structural details of offshore plants can be accumulated due to various environmental loadings such as swell, wave, wind and current. It is known that load histories acting on mooring and riser systems show stationary and ergodic bimodal wide-banded process. This paper provides refined approach to obtain time signals representing stress range histories from wide-banded bimodal spectrum which consists of ideally narrow-banded and fully separated two spectrums. Variations of the probabilistic characteristics for time signals according to frequency and sampling time increments are compared with the reference data to be the probabilistic characteristics such as zero-crossing period, peak period, and irregularity factor obtained from an assumed ideal spectrum. It is proved that the sampling time increment more affects on the probabilistic characteristics than frequency increment. The fatigue damages according to the frequency and sampling time increments are also compared with the ones with minimum increment condition which are thought to be exact fatigue damage. It is concluded that the maximum sampling time increment to obtain reliable time signals should be determined that ratio of applied maximum sampling time increment and minimum period is less than approximately 0.08.

• Journal of Power Electronics
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• 제11권1호
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• pp.64-73
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• 2011

The stability of PWM rectifiers with a deadbeat current controller is seriously influenced by computation time delays and low-pass filters inserted into the current-sampling circuit. Predictive current control is often adopted to solve this problem. However, grid current predictive precision is affected by many factors such as grid voltage estimated errors, plant model mismatches, dead time and so on. In addition, the predictive current error aggravates the grid current distortion. To improve the grid current predictive precision, an improved deadbeat current controller with a repetitive-control-based observer to predict the grid current is proposed in this paper. The design principle of the proposed observer is given and its stability is discussed. The predictive performance of the observer is also analyzed in the frequency domain. It is shown that the grid predictive error can be decreased with the proposed method in the related bode diagrams. Experimental results show that the proposed method can minimize the current predictive error, improve the current loop robustness and reduce the grid current THD of PWM rectifiers.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2000년도 전력전자학술대회 논문집
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• pp.339-342
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• 2000

Repetitive Load Prediction is proposed for the UPS inverter application of the second order deadbeat controller which is robust against the calculation time delay and the parameter variation and which gets fast response against the load variation. The proposed technique predicts the load current ahead of two sampling time using that the load current is periodic. This is effective under nonlinear load condition. The proposed technique is derived theoretically and verified through simulation and experimental result.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 1989년도 한국자동제어학술회의논문집; Seoul, Korea; 27-28 Oct. 1989
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• pp.124-126
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• 1989

Inverse kinematic problem is a crucial point for robot manipulator control. In this paper, to implement the Jacobian control technique we used the Hopfield(Tank)'s neural network. The states of neurons represent joint veocities, and the connection weights are determined from the current value of the Jacobian matrix. The network energy function is constructed so that its minimum corresponds to the minimum least square error. At each sampling time, connection weights and neuron states are updated according to current joint position. Inverse kinematic solution to the planar redundant manipulator is solved by computer simulation.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2002년도 하계학술대회 논문집 B
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• pp.1084-1087
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• 2002

This paper presents an improved fuzzy logic-based adaptive PWM technique. A fuzzy logic- based adaptive PWM technique determines the optimal output voltage vector which takes into account both direction of back-emf and direction of current error vector. This technique has a simple structure and a good level of stability, but it has disadvantages. The longer sampling period, the larger current error. Because there is no considerations of the current error magnitude of each phases. The proposed method improves the control performance by selecting the optimum switching pattern in which the magnitudes of current errors are considered introducing space vector concept. Simulation results using Matlab/Simulink show that the proposed control method reduces current error keeping the merit of previous one.

• Transactions on Electrical and Electronic Materials
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• 제10권2호
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• pp.44-48
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• 2009

A simulation study of a 10-bit two-stage DAC was done by using a conventional current switch cell. The DAC adopts the segmented architecture in order to reduce the circuit complexity and the die area. The 10-bit CMOS DAC was designed in 2 blocks, a unary cell matrix for 6 MSBs and a binary weighted array for 4 LSBs, for fabrication in a 0.35-${\mu}m$ CMOS process. To cancel the accumulation of errors in each current cell, a symmetrical switching sequence is applied in the unary cell matrix for 6 MSBs. To ensure high-speed operation, a decoding circuit with one stage latch and a cascode current source were developed. Simulations show that the maximum power consumption of the 10-bit DAC is 74 mW with a sampling frequency of 100 MHz.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1998년도 추계종합학술대회 논문집
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• pp.819-822
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• 1998

A new active power filter (APF) circuit with a current compesation estimation method is proposed. The current compensation estimation method replaces a current sensor with an estimating circuit and therefore reduces the implementation cost In addition, a simple control scheme, based on the energy balance concept, is adopted to control the voltage of a DC capacitor. Therefore energy change in the DC capacitor can be compensanted in the next cycle. Since a sampling technique is used, a larger DC capacitor voltage ripple can be permissible and a relatively smaller DC capacitor can be used. The proposed method has advantages of the reduction of one current sensor, low implementation cost, and fast transient responses. The theoretical analysis and simulation results are given. The proposed control method is successfully verified by computer simulation.

• 전기학회논문지P
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• 제56권3호
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• pp.136-141
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• 2007

In this paper, a new simple control method for active power filter which can realized the complete compensation of the harmonic currents is proposed. In the proposed scheme, a compensating current reference generator employing resonance model implemented by a DSP(Digital Signal Processor) is introduced. Deadbeat control is employed to control the active power filter. The switching pulse width based SVM(Space Vector Modulation) is adopted so that the current of active power filter is been exactly equal to its reference at the next sampling instant. To compensate the computation delay of digital controller, the prediction of current is achieved by the current observer with deadbeat response.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1998년도 하계종합학술대회논문집
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• pp.958-961
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• 1998

In this paper, a three phase boost converter that operates with unity power factor and sinusodial input currents is presented. The current control of the converter is based on the space vector strategy with fixed switching frequency and the input current tracks the reference current within one sampling time interval. Space vector strategy for current control was materialized as a digital control method by using DSP. By using this control strategy low ripples in the output voltage, low harmonics in the input current and fast dynamic responses are achieved with a small capacitance in the dc link.