• Journal of the Institute of Convergence Signal Processing
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• v.8 no.2
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• pp.113-118
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• 2007

In this paper, a novel approach to using Subcircuit of Pspice in designing feedback for DC-DC converter systems is proposed. Proposed new approach, the feedback design procedures which are based on small signal modeling are programmed as a subcircuit in Pspice. For this purpose, Analog Behavioral Modeling (ABM) is used. By using the subcircuit, the component values of the error compensation amplifier can be easily obtained by means of Pspice DC analysis. The methodology of development is presented in detail and application examples demonstrated the effectiveness of the proposed approach in designing feedbacks for DC-DC converters. The converter with PWM method used continuous current mode and calculated buck converter control signal with average and linear current technique. To decide pole and zero K-method was adapted and this kind of design procedure took stable function.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.12
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• pp.82-90
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• 2011

A novel class AB current subtracter(CS) and its application to Norton amplifier(NA) for low-power current-mode signal processing are designed. The CS is composed of a translinear cell, two current mirrors, and two common-emitter(CB) amplifiers. The principle of the current subtraction is that the difference of two input current applied translinear cell get from the current mirror, and then the current amplify through CB amplifier with ${\beta}$ times. The NA is consisted of the CS and wideband voltage buffer. The simulation results show that the CS has current input impedance of $20{\Omega}$, current gain of 50, and current input range of $i_{IN1}$ > $i_{IN2}{\geq}4I_B$. The NA has unit gain frequency of 312 MHz, transresistance of 130 dB, and power dissipation of 4mW at ${\pm}2.5V$ supply voltage.

• Journal of the Optical Society of Korea
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• v.14 no.2
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• pp.137-141
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• 2010

We report, for the first time to our knowledge, observation of polarization bistability from 1.55-${\mu}m$ wavelength single-mode VCSELs of a conventional cylinder-shape under control of their driving current, and demonstration of all-optical flip-flop (AOFF) operations based on the bistability with optical set and reset pulse injection at a 50 MHz switching frequency. The injection pulse energy was less than 14 fJ. The average on-off contrast ratio of the flip-flopped signals was about 7 dB. These properties of the VCSELs will be potentially useful for future high-speed all-optical signal processing applications.

• Journal of Welding and Joining
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• v.14 no.4
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• pp.24-32
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• 1996

용접공정 해석을 위한 접근방법중에서 우선적으로 결정해야할 사항으로는 비선형적인 요소와 복잡한 물리현상들을 실제적으로 해석하기위한 측정변수의 선정과 이러한 변수를 사용하여 물리적인 현상을 적절히 표현할 수 있는 알고리즘의 개발 등 을 들 수 있다. 최근까지의 연구결과를 바탕으로 해서 측정변수들의 예를 들면 용접 전류(welding current), 아크전압(arc voltage), 음향신호(acoustic signal), 아크 광(arc light) 그리고 온도(temperature)등이 있다. 용접공정을 분석하기 위한 알고 리즘으로는 확률론적 접근(statistical approach), 다양한 실험치를 이용한 인공지능 적 접근(artificial intelligence approach) 그리고 경험치를 바탕으로 인덱스(index) 을 선정하여 이를 직접 사용하는 방법 및 인공지능과 결합된 형태를 이용하는 방법등 이 있다. 또한 용접공정의 특성을 분석하기 위해서는 크게 금속이행모드(metal transfer mode), 아크의 안정성(arc stability) 그리고 용접품질(weld quality) 등을 판별할 수 있는 알고리즘의 개발이 필수적이라 할 수 있다. 본 논문에서는 용접공정 분석과 관련된 최근까지의 연구동향 및 용접신호의 특성을 좀더 심도있게 분석하기 위해 구축해야 할 필수 요건 등을 소개하고자 하며 이를 사용자가 손쉽게 이용할 수 있는 사용자 인터페이스 프로그램을 개괄적으로 설명하고자 한다.

• Journal of Sensor Science and Technology
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• v.4 no.2
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• pp.22-28
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• 1995

A Michelson interferometric AC current sensor has been fabricated by using a single mode optical fiber and a cylindrical PZT tube of which a radial dimension varies with applied voltage. The signal processing scheme used in this work, measures the magnitude of AC current regardless of the frequency of the current. An AC current is measured by counting the number of interference fringe during half cycle of the AC current. The number of interference fringes varies linearly with the magnitude of the current and the error range is within 5% at the temperature range from $-20^{\circ}C$ to $80^{\circ}C$.

• The Journal of the Korea institute of electronic communication sciences
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• v.11 no.2
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• pp.159-164
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• 2016

A wireless communication system is required to be implemented with the low power circuits because it uses a battery having a limited energy. Therefore, the current mode circuit has been studied because it consumes constant power regardless of the frequency change. However, the clock-feedthrough problem is happened by leak of stored energy in memory operation. In this paper, we suggest the current memory circuit to minimize the clock-feedthrough problem and introduce a technique for ultra low power operation by inducing dynamic voltage scaling. The current memory circuit was designed with BSIM3 model of $0.35{\mu}m$ process and was operated in the near-threshold region. From the simulation result, the clock-feedthrough could be minimized when designing the memory MOS Width of $2{\mu}m$, the switch MOS Width of $0.3{\mu}m$ and dummy MOS Width of $13{\mu}m$ in 1MHz switching operation. The power consumption was calculated with $3.7{\mu}W$ at the supply voltage of 1.2 V, near-threshold voltage.

• Journal of Broadcast Engineering
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• v.9 no.3
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• pp.214-224
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• 2004

In this paper, an adaptive spatio-temporal predictive coding based on the H.264 is proposed for 3D immersive media encoding, such as 3D image processing, 3DTV, and 3D videoconferencing. First, we propose a spatio-temporal predictive coding using the same view and inter-view images for the two TPPP, IBBP GOP (group of picture) structures 4hat are different from the conventional simulcast method. Second, an 2D inter-view direct mode for the efficient prediction is proposed when the proposed spatio-temporal prediction uses the IBBP structure. The 2D inter-view direct mode is applied when the temporal direct mode in B(hi-Predictive) picture of the H.264 refers to an inter-view image, since the current temporal direct mode in the H.264 standard could no: be applied to the inter-view image. The proposed method is compared to the conventional simulcast method in terms of PSNR (peak signal to noise ratio) for the various 3D test video sequences. The proposed method shows better PSNR results than the conventional simulcast mode.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.38 no.11
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• pp.836-845
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• 2001

A Novel fully-differential bipolar current subtracter(FCS) and its application to current controlled current amplifier(CCCA) for high-accuracy current-mode signal processing were designed. To obtain full-differential current output, the FCS was symmetrically composed of two current follower with low current-input impedance. The CCCA to control output current by the bias current was consisted of the subtracter and a current gain amplifier(CGA) with single-ended current output.. The simulation result shows that the FCS has current-input impedance of 5 Ω and a good linearity. The CCCA has 3-dB cutoff frequency of 20 MHz for the range over bias current 100 $\mu$A to 20 mA. The power dissipation of the FCS and CCCA are 1.8 mW and 3 mW, respectively.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.11
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• pp.48-56
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• 2011

Novel class-A bipolar current conveyor($CCII{\pm}$) with differential current output and its application to output current controllable CCII+ for electronic tuning systems are designed. The $CCII{\pm}$ is consists of conventional CCII+ and complementary cross current sources. The CCII+ with controllable the output current consists of the $CCII{\pm}$ and a current gain amplifier with single-ended current output. The simulation result shows that the $CCII{\pm}$ has current input impedance of $1.9{\Omega}$ and a good linearity for voltage and current follower. The proposed CCII+ has 3-dB cutoff frequency of 10MHz for the range over bias control current $100{\mu}A$ to 10mA. The range of output current control is four decade. The power dissipation of the CCII+ is 4.5mW at supply voltage of ${\pm}2.5V$.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.38 no.10
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• pp.754-764
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• 2001

Class A bipolar second-generation current conveyor (CCII) with low current-input impedance and its offset-compensated CCII for high-accuracy current-mode signal processing are proposed. The CCIIs consist of a regulated current-cell for current input, a emitter follower for voltage input, and a cascode current mirror lot current output. In these architecture, the two input stages are coupled by current mirror to reduce the current input impedance. Experiments show that the CCII has impedance of 8.4 Ω and offset voltage of 40 mV at current input terminal. To reduce this offset, the offset-compensated CCII adopts diode-connected npn and pnp transistor in the proposed CCII. Experiments show that the offset-compensated CCII has current input impedance of 2.1 Ω and offset voltage of 0.05 mV. The 3-dB cutoff frequency of the CCIIs when used as a voltage follower extends beyond 30 MHz. The power dissipation is 7.0 mW