• 전력전자학회논문지
• /
• 제22권3호
• /
• pp.231-239
• /
• 2017

A novel current control technique with fast response and application in an unbalanced system is proposed in this paper. Contrary to the conventional PI and dead-beat current control techniques, the proposed method is adopted to the valley current mode control (VCMC) and average current mode control (ACMC) methods to overcome the phase delay caused by conventional methods. The advantages of the proposed system are simplicity of structure and ease of implementation. The VCMC and ACMC methods are established and applied to the buck converter, boost converter, three-phase PWM converter, and three-phase inverter. The control performances of the proposed systems are shown by computer simulations and verified by experimental results.

• 한국컴퓨터정보학회논문지
• /
• 제28권12호
• /
• pp.231-238
• /
• 2023

부스트 PFC (Power Factor Correction)컨버터는 AC 입력 전류의 단일 역률과 낮은 THD (Total Harmonic Distortion)를 달성하기 위해 다양한 제어기법들이 연구되고 있다. 그중 인덕터 전류의 평균값을 전류지령에 추종하도록 제어하는 평균전류 모드 제어가 있으며 가장 널리 사용되고 있다. 하지만, 오늘날 디지털 프로세서의 발달로 고도화된 디지털 제어가 가능해지면서 부스트 PFC 컨버터의 예측제어가 관심을 받고 있다. 예측제어에는 예측 알고리즘으로 듀티를 미리 생성하는 예측전류 모드 제어 및 모델을 기반으로 한 비용함수를 선정하여 스위칭 동작을 하는 모델예측제어로 분류된다. 따라서 본 논문에서는 부스트 PFC 컨버터의 평균전류 모드 제어, 예측전류 모드 제어, 모델예측 전류 제어를 간단히 설명한다. 또한, 시뮬레이션을 통해 전체 부하 및 다양한 외란 조건에서의 전류 제어를 비교 분석한다.

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 1993년도 하계학술대회 논문집 B
• /
• pp.886-888
• /
• 1993

Recently current mode control is widely adopted in switching power converter because of inherent stablity and ability of parallel operating. There are several ways in current mode control. One of them, peak current control is chiefly employed. Peak current mode control converter usually senses and controls peak inductor current. But there is peak-to-average current errors. Therefore peak current control needs compensation ramp correcting the errors. Average current mode control eliminates these problems, and is constructed by simple structures. This paper will describe the behavior of a simple average current mode boost converter and introduce the design techniques.

• 전력전자학회논문지
• /
• 제24권5호
• /
• pp.334-341
• /
• 2019

This study proposes the control strategy for the seamless mode transfer of indirect current controlled parallel grid-connected inverters. Under the abnormal grid condition, the grid-connected inverter can convert the operation mode from grid-connected to stand-alone mode to supply power to the local load. For a seamless mode transfer, the time delay problems caused by the accumulated control variable error must be solved, and the indirect current control method has been applied as one of the solutions. In this study, the design of control parameters for the proportional-resonant-based triple-loop indirect current controller and the control strategy for the seamless mode transfer of parallel grid-connected inverters are described and analyzed. The validity of the proposed mode transfer method is verified by the PSiM simulation results.

• 전력전자학회논문지
• /
• 제3권4호
• /
• pp.338-345
• /
• 1998

The mathematical interpretation of a practical sampler which is useful to obtain the small signal models for the peak and average current mode controls is proposed. Due to the difficulties in applying the Shannons sampling theorem to the analysis of sampling effects embedded in the current mode control, several different approaches have been reported. However, these approaches require the information of the inductor current in a discrete expression, which restricts the application of the reported method only to the peak current mode control. In this paper, the mathematical expressions of sampling effects on a current loop which can directly apply the Shannons sampling theorem are newly proposed, and applied to the modeling of the peak current mode control. By the newly derived models of a practial smapler, the models in a discrete time domain and a continuous time domain are obtained. It is expected that the derived models are useful for the control loop design of power supplies. The effectiveness of the derived models are verified through the simulation and experimental results.

• 제어로봇시스템학회논문지
• /
• 제22권6호
• /
• pp.417-423
• /
• 2016

Using a sliding mode controller and observer techniques, this paper presents a robust current controller for a DC motor in the presence of parametric uncertainties. One of the most important issues in the practical application of sliding mode schemes is the chattering phenomenon caused by switching actions. This paper presents a novel sliding mode controller that incorporates an integral control with a sliding mode disturbance observer to attenuate the chattering by reducing the controller/observer switching gains. The proposed sliding mode disturbance observer is designed to estimate a relatively slow varying signal in the equivalent lumped disturbance owing to system uncertainties. Combining the estimated uncertainty with the sliding mode control input, the proposed controller can achieve the control objective by using the relatively low gain of the controller. The proposed disturbance observer does not include the switching control input of the baseline sliding mode controller to reduce the observer switching gain. In the proposed approach, the integral sliding mode control is used to improve the steady state control performance. Comparative computer simulations are carried out to demonstrate the performance of the proposed method. Through the simulation results, the proposed controller realizes the robust performance with reduced current ripples.

• Journal of Power Electronics
• /
• 제11권1호
• /
• pp.59-63
• /
• 2011

This paper presents the modeling of the sampling effect in the p-type average current mode control. The prediction of the high frequency components near half of the switching frequency in the current loop gain is given for the p-type average current mode control. By the proposed model, the prediction accuracy is improved when compared to that of conventional models. The proposed method is applied to a buck converter, and then the measurement results are analyzed.

• Journal of Electrical Engineering and Technology
• /
• 제10권5호
• /
• pp.1989-2000
• /
• 2015

In this paper, digital peak current mode control for single phase H-bridge inverters is developed and implemented. The digital peak current mode control is achieved by directly controlling the PWM signals by cycle-by-cycle current limitation. Unlike the DC-DC converter where the output voltage always remains in the positive region, the output of DC-AC inverter flips from positive to negative region continuously. Therefore, when the inverter operates in negative region, the control should be changed to valley current mode control. Thus, a novel control logic circuit is required for the function and need to be analyzed for the hardware to track the sinusoidal reference in both regions. The problem of sub-harmonic instability which is inherent with peak current mode control is also addressed, and then proposes the digital slope compensation in constant-sloped external ramp to suppress the oscillation. For unipolar PWM switching method, an adaptive slope compensation in digital manner is also proposed. In this paper, the operating principles and design guidelines of the proposed scheme are presented, along with the performance analysis and numerical simulation. Also, a 200W inverter hardware prototype has been implemented for experimental verification of the proposed controller scheme.

• 전력전자학회논문지
• /
• 제24권2호
• /
• pp.134-137
• /
• 2019

A wide-bandwidth current controller is required for fast charging/discharging of super capacitor applications. Peak current mode is generally used to accomplish fast charging/discharging because this mode has fast response characteristics. However, the peak current mode control must have a slope compensation function to restrain sub-harmonics oscillation. The slope must be changed accordingly if the controlled output voltage is varied. However, changing the slope for every changed output voltage is not easy. The other solution, selecting the slope as the maximum value, causes a slow response problem to occur. Therefore, we propose a hybrid mode controller that uses a peak current and a newly specified valley current. Through the proposed hybrid mode control, the sub-harmonic oscillation does not occur when the duty is larger than 0.5 because of the fast response.

• 전력전자학회:학술대회논문집
• /
• 전력전자학회 1998년도 전력전자학술대회 논문집
• /
• pp.275-278
• /
• 1998

The mathematical interpretation of a practical sampler which is useful to obtain the small signal models for the peak and average current mode controls is proposed. Due to the difficulties in applying the Shannon's sampling theorem to the analysis of sampling effects embedded in the current mode control, several different approaches have been reported. However, these approaches require the information of the inductor current in a discrete expression, which restricts the application of the reported method only to the peak current mode control. In this paper, the mathematical expressions of sampling effects on a current loop which can directly apply the Shannon's sampling theorem are newly proposed, and applied to the modeling of the peak current mode control. By the newly derived models of a practical sampler, the models in a discrete time domain and a continuous time domain are obtained. It is expected that the derived models are useful for the control loop design of power supplies. The effectiveness of the derived models are verified through the simulation and experimental results.