• 대한전자공학회논문지SD
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• 제40권4호
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• pp.42-50
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• 2003

본 논문에서는 시스템의 클럭을 안정적으로 공급하는 집적화 한 내장형 RC oscillator의 구현에 관한 논문이다. 기존의 RC oscillator는 온도에 따라 주파수변화가 약 15%정도 변화가 있는데 이는 온도에 따른 저항값의 변화와 schmit trigger의 기준전압이 온도에 따라 변화하기 때문이다. 본 연구에서는 온도에 따른 주파수 변화를 최소화하는 방법으로 CMOS bandgap과 온도에 따른 전류의 변화를 이용하였다. CMOS bandgap으로 기준 전압을 얻고 온도에 따라 증가하는 전류원과 온도에 따라 감소 하는 전류원을 서로 합하면 온도에 따라 일정한 전류를 얻어 주파수의 변화를 약 3%이내로 유지하는 회로를 제안한다.

• 한국태양에너지학회 논문집
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• 제32권3호
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• pp.26-32
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• 2012

A current compensation method to reduce the mismatch loss in PV systems is proposed as a way to increase the power generation efficiency. A dc-dc converter is used to supply currents to irregular modules in a PV string and is powered from the string output. The converter's voltage conversion ratio is adjusted so that all the modules in the string are operated at the maximum power point. The power rating and size of the converter can be reduced since only the current difference between the regular and irregular module may be supplied. The compensated string shows very little voltage mismatch compared to other regular strings. The validity of the proposed method is verified through a simulation and experiments in a prototype PV system.

• 전기학회논문지
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• 제60권2호
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• pp.279-284
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• 2011

Harmonic distortions in current waveform may cause significant problems in electric power system facility and operation. This paper presents an adaptive parameter estimation method to detect harmonic current components caused by nonlinear loads. In addition, a coordination strategy for multiple inverter-interfaced distributed generators to compensate the harmonic currents is discussed. The coordination strategy is realized by distributing the harmonic compensation participation index to individual distributed generators. The harmonic compensation participation index can be determined by the amount of remaining power generation capacity of each distributed generator. Simulation results based on switching-level inverter models show that the proposed harmonic detection method has good performance and the coordination strategy can improve harmonic problems efficiently.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1998년도 추계학술대회 논문집 학회본부A
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• pp.16-18
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• 1998

In this paper, a control method based on finite element analysis is presented to reduce the thrust ripple of the permanent magnet linear synchronous motor (PMLSM). In the control method, additional compensation current is added to the conventional control current according to the position of mover. The exact value of the compensation current is calculated from finite element analysis. To conform the validity of the presented method, a test set is built and experiments are performed.

• 한국전자통신학회논문지
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• 제8권2호
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• pp.307-312
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• 2013

우리나라의 잔여지 보상제도는 크게 잔여지 매수 보상, 잔여지 감가보상, 잔여지 공사비 보상 등 세 가지로 나눌 수 있으며, 이 중 매수보상에서는 매수대상 요건이 주로 문제가 되고, 공사비보상에 대해서는 별도로 문제가 되는 부분이 거의 없다. 본 연구에서는 현행 잔여지 감가보상제도의 내용과 문제점을 살펴보고, 미국과 일본의 제도를 비교 분석하여 우리나라의 보상제도와의 차이점을 알아보고 잔여지 감가보상에 대한 정책적 대안을 마련하고자 한다.

• 한국산학기술학회논문지
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• 제16권12호
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• pp.8306-8313
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• 2015

개방형 전류측정기는 DC 모터 콘트롤러, AC 가변 콘트롤러, UPS(Uninterruptible Power System)에 주로 사용되며 최근 신재생 에너지의 성장과 전력망의 스마트 그리드화로 인하여 활용성이 점차 확대되고 있다. 이러한 신재생 에너지의 성장으로 관련 핵심기술의 보유여부가 중요해지고 있으며 대부분 수입에 의존하고 있는 개방형 전류측정기의 국산화 및 관련 기술의 확보를 필요로 한다. 본 논문에서는 일반 산업용 개방형 전류측정기의 제작과정과 특성을 측정한 결과를 기술하였다. 개방형 전류측정기를 구성하는 C형 철심의 공극자장분포 해석 및 형상 설계, 홀센서의 선정 및 특성시험, 정전류 전원공급회로와 신호처리회로의 회로설계 과정을 기술하며 DIP(Dual In-line Package) type과 SMD (Surface Mount Device) type의 100A급 개방형 전류측정기를 제작하고 특성을 측정했다. 제작된 전류측정기로 0~100A 범위에서 통전 실험을 실시한 했고 직류전류와 60Hz의 교류전류에서 특성을 측정한 결과 정밀도 오차 2% 이내, 선형도 오차 2% 이내의 성능을 만족하였다. 또한 부 특성 온도계수를 갖는 NTC(Negative Temperature Coefficient) 서미스터를 이용한 온도보상회로를 사용하여 $-35{\sim}100^{\circ}C$의 범위에서 온도보상 효과를 확인하였다.

• Journal of Power Electronics
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• 제11권4호
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• pp.576-582
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• 2011

This paper presents a novel control strategy for selective compensation of power quality (PQ) problems, depending upon the limited rating of voltage source inverters (VSIs), through a unified power quality conditioner (UPQC) in a three-phase four-wire distribution system. The UPQC is realized by the integration of series and shunt active power filters (APFs) sharing a common dc bus capacitor. The shunt APF is realized using a three-phase, four-leg voltage source inverter (VSI), while a three-leg VSI is employed for the series APF of the three-phase four-wire UPQC. The proposed control scheme for the shunt APF, decomposes the load current into harmonic components generated by consumer and distorted utility. In addition to this, the positive and negative sequence fundamental frequency active components, the reactive components and harmonic components of load currents are decomposed in synchronous reference frame (SRF). The control scheme of the shunt APF performs with priority based schemes, which respects the limited rating of the VSI. For voltage harmonic mitigation, a control scheme based on SRF theory is employed for the series APF of the UPQC. The performance of the proposed control scheme of the UPQC is validated through simulations using MATLAB software with its Simulink and Power System Block set toolboxes.

• 전력전자학회논문지
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• 제20권5호
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• pp.429-436
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• 2015

Torque ripples generate mechanical vibration at low speed and acoustic noise at high speed. The back emf harmonics of a PM synchronous motor is one of the main sources of torque ripples. To reduce torque ripples resulting from back emf harmonics, dq-axis harmonic currents that reduce the torque ripples are generally compensated to the current controller. Harmonic current compensation is effective at low speed, but it is not applicable at high speed because of the limited bandwidth of the current controller. In this study, dq-axis harmonic voltage compensation that can reduce torque ripples at high speed is proposed. The dq-axis harmonic voltages are calculated from the motor speed and the dq-axis harmonic currents. The effectiveness of the proposed method in reducing torque ripple is verified by a simulation and experiments.

• 전력전자학회논문지
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• 제22권2호
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• pp.166-174
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• 2017

This study proposes a compensation method for the dead-time effects on a single-phase grid-connected inverter. Dead time should be considered in the pulse-width modulation gating signals to prevent the simultaneous conduction of switching devices, considering that a switching device has a finite switching time. Consequently, the output current of the grid-connected inverter contains odd-numbered harmonics because of the dead time and the nonlinear characteristics of the switching devices. The effects of dead time on output voltage and current are analyzed in this study. A new compensation algorithm based on second-order generalized integrator is also proposed to reduce the dead-time effect. Simulation and experimental results validate the effectiveness of the proposed compensation algorithm.

• Journal of Power Electronics
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• 제19권1호
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• pp.89-98
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• 2019

This paper analyzes the input side performance of a conventional three-phase to single-phase matrix converter (3-1MC). It also presents the input-side waveform quality under this topology. The suppression of low-frequency input current harmonics is studied using the 3-1MC plus capacitance compensation unit. The constraint between the modulation function of the output and compensation sides is analyzed, and the relations among the voltage utilization ratio and the output compensation capacitance, filter capacitors and other system parameters are deduced. For a 3-1MC without large-capacity energy storage, the system performance is susceptible to input voltage imbalance. This paper decouples the inner current of the 3-1MC using a Lyapunov function in the input positive and negative sequence bi-coordinate axes. Meanwhile, the outer loop adopts a voltage-weighted synthesis of the output and compensation sides as a cascade of control objects. Experiments show that this strategy suppresses the low-frequency input current harmonics caused by input voltage imbalance, and ensures that the system maintains good static and dynamic performances under input-unbalanced conditions. At the same time, the parameter selection and debugging methods are simple.