• 제목/요약/키워드: current compensation

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Compensation of Neutral Point Deviation under Generalized 3-Phase Imbalance in 3-level NPC

  • Jung, Kyungsub;Suh, Yongsug
    • Journal of Power Electronics
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    • v.18 no.6
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    • pp.1866-1878
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    • 2018
  • This paper presents a neutral point deviation and ripple compensation control method for application to 3-level NPC converters. The neutral point deviation and its harmonic components are analyzed with a focus on the average current flowing through the neutral point of the dc-link. This paper also proposes a control scheme to compensate for the neutral point deviation and dominant harmonic components under generalized unbalanced grid operating conditions. The positive and negative sequence components of the pole voltages and ac input currents are employed to accurately explain the behavior of 3-level NPC converters. Simulation and experimental results are presented to verify the validity of the proposed method.

Design of a Step-Down DC-DC converter with On-chip Capacitor multiplyed Compensation circuit (온칩된 커패시터 채배기법 적용 보상회로를 갖는 DC to DC 벅 변환기 설계)

  • Park, Seung-Chan;Lim, Dong-Kyun;Yoon, Kwang-Sub
    • Proceedings of the IEEK Conference
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    • 2008.06a
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    • pp.537-538
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    • 2008
  • A step-down DC-DC converter with On-chip Compensation for battery-operated portable electronic devices which are designed in 0.18um CMOS standard process. In an effort to improve low load efficiency, this paper proposes the PFM (Pulse Frequency modulation) voltage mode 1MHz switching frequency step-down DC-DC converter with on-chip compensation. Capacitor multiplier method can minimize error amplifier compensation block size by 20%. It allows the compensation block of DC-DC converter be easily integrated on a chip and occupy less layout area. But capacitor multiplier operation reduces DC-DC converter efficiency. As a result, this converter shows maximum efficiency over 87% for the output voltage of 1.8V (input voltage : 3.3V), maximum load current 500mA, and 0.14% output ripple voltage. The total core chip area is $mm^2$.

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Improvement of line Current using Instantaneous Real Power Compensation of DSTATCOM (DSTATCOM의 순시 유효전력 보상을 이용한 선로의 전류 개선)

  • Jeong, Su-Yeong;Kim, Tae-Hyeon;Mun, Seung-Il;Gwon, Uk-Hyeon
    • The Transactions of the Korean Institute of Electrical Engineers A
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    • v.51 no.7
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    • pp.327-332
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    • 2002
  • In this paper, conventional reactive power compensation is defined and instantaneous real control concept for shunt converters is proposed. This equipment incorporates the compensation function of harmonics at the distribution line by nonlinear load. These methodologies are applied to IEEE 13 distribution system with the modeling of nonlinear load using EMTEDC/PSCAD package. Simulation with EMTDC results presented to confirm that the new approach has better performance than those obtained by controllers based on traditional concepts of reactive power compensation.

Effect of Five Star Hotel Restaurant Cook's Emotional labor on Job Satisfaction and Customer Orientation

  • KIM, Hey-Sook
    • East Asian Journal of Business Economics (EAJBE)
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    • v.8 no.2
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    • pp.1-14
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    • 2020
  • Purpose - The current study analyzes effects of hotel restaurant cook's emotional labor on job satisfaction and customer orientation. Research design and methodology - In order to achieve the current study's goal, sample was extracted targeting cooks working in 5-stars hotels located in Seoul considering spatial and time limitation. Method of research was direct research method with survey. Survey was conducted from April 1st, 2018 to April 20, 2018 (approximately 20 days). Total of 300 surveys were distributed to cooks working in 5-stars hotels located in Seoul, and among those 250 surveys were returned. Among returned 250 surveys, 246 surveys. Results - First, in order to test H1, effect of hotel restaurant cook's emotional labor on job satisfaction (satisfaction on superior and coworker) was analyzed. Second, in order to test H2, effect on hotel restaurant cook's emotional labor on job satisfaction (satisfaction on compensation and promotion) was analyzed. Third, satisfaction on superior and coworker had statistically significantly positive effect on customer orientation, while satisfaction on compensation and promotion did not have statistically significant effect. Conclusions - First, deep acting had statistically significantly positive effect on job satisfaction (satisfaction on superior and coworker), while surface acting did not have statistically significant effect. Second, both deep and surface acting had statistically significantly positive effect on job satisfaction (satisfaction on compensation and promotion). Third, satisfaction on superior and coworker had statistically significantly positive effect on customer orientation, while satisfaction on compensation and promotion did not have statistically significant effect.

Application of the dead time compensation algorithm for a low-cost general purpose inverter (데드타임 보상 알고리즘의 범용 인버터 적용)

  • Jeong, S.J.;Kim, S.K.;Kim, S.H.;Shin, H.J.;Han, K.J.;Kim, M.C.;Lee, S.J.
    • Proceedings of the KIPE Conference
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    • 2005.07a
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    • pp.8-10
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    • 2005
  • In a general purpose inverter, a dead-time compensation strategy is very important for reducing torque ripples and acoustic noises of motors. However, in the case of small capacity inverter, the accurate dead-time compensation is hard to be obtained because a removal of the switching noise in a feedback current signal is difficult on condition of low-cost implementation. In this paper, the operation characteristics of the general purpose inverter applied the dead time compensation algorithm using an instantaneous back calculation of the phase angle of the current are presented.

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Design of monolithic DC-DC Buck converter with on chip soft-start circuit (온칩 시동회로를 갖는 CMOS DC-DC 벅 변환기 설계)

  • Park, Seung-Chan;Lim, Dong-Kyun;Lee, Sang-Min;Yoon, Kwang-Sub
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.34 no.7A
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    • pp.568-573
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    • 2009
  • This paper presents a step-down DC-DC converter with On-chip Compensation for battery-operated portable electronic devices which are designed in O.13um CMOS standard process. In an effort to decrease system volume, this paper proposes the on chip compensation circuit using capacitor multiplier method. Capacitor multiplier method can minimize error amplifier's compensation capacitor size by 10%. It allows the compensation block of DC-DC converter be easily integrated on a chip and occupy less layout area. But capacitor multiplier operation reduces DC-DC converter efficiency. As a result, this converter shows maximum efficiency over 87.2% for the output voltage of 1.2V (input voltage : 3.3V), maximum load current 500mA, and 25mA output ripple current. This voltage mode controled buck converter has 1MHz switching frequency.

Control Strategy and Characteristic Analysis of Hybrid Active Power Filters with the Resonant Impedance Principle

  • Fang, Lu;Xu, Xian-Yong;Luo, An;Li, Yan;Tu, Chun-Ming;Fang, Hou-Hui
    • Journal of Power Electronics
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    • v.12 no.6
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    • pp.935-946
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    • 2012
  • A new kind of resonant impedance type hybrid active filter (RITHAF) is proposed for dynamic harmonic current suppression and high capacity reactive compensation in medium and high voltage systems. This paper analyzed the different performance of the RITHAF when the active part of the RITHAF is controlled as a current source and as a voltage source, respectively. The harmonic suppression function is defined in this paper. The influences of the changes caused by the grid impedance and the detuning of the passive power filter on the compensating characteristics of the RITHAF are studied by analyzing the suppression function. Simulation and industrial application results show that the RITHAF has excellent performances in harmonic suppression and reactive compensation, which is suitable for medium and high voltage systems.

A Legal Study on Improvement Plans for Citizen Safety Insurance Operation and Management System (시민안전보험 운영관리체계의 개선방안 연구)

  • Lee, Jung-Im
    • Journal of the Korea Safety Management & Science
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    • v.24 no.2
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    • pp.77-85
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    • 2022
  • This study tried to suggest a systematic improvement plan to prepare a civil safety insurance operation and management system by reviewing the operation and management status of civil safety insurance, which is operated and managed by each local government autonomously. In this study, the problems of the current civil safety insurance were analyzed by dividing them into the lack of systematic management of insurance items, overlapping coverage between insurance items, and deviations in compensation limits. As a systematic improvement plan, it was suggested to secure the systemic management of guarantee items, standardize compensation standards, prepare an integrated operation and management system, and provide financial support for local governments with poor financial independence. Since the problems and improvement plans for the civil safety insurance analyzed as described above are formed by exchanging and receiving a complex mutual influence, the institutional improvement plan for the operation and management system of the civil safety insurance is not only a specific part of the study, but also comprehensively current citizens. Based on the results derived from the analysis of safety insurance, it is concluded that alternatives must be found.

A Design of 18 MHz Relaxation Oscillator with ±1 % Accuracy Based on Temperature Sensor (Temperature Sensor 기반 ±1 % 이내의 주파수 정확도를 가지는 18 MHz Relaxation Oscillator의 설계)

  • Kim, Sang Yun;Lee, Ju Ri;Lee, Dong Soo;Park, Hyung Gu;Kim, Hong Jin;Lee, Kang-Yoon
    • Journal of Korea Society of Industrial Information Systems
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    • v.18 no.5
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    • pp.39-44
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    • 2013
  • In this paper, a Relaxation Oscillator with temperature compensation using BGR and ADC is presented. The current to determine the frequency of Relaxation Oscillator can be controlled. By adjusting the current according to the temperature using the code that is output from the ADC and BGR, was to compensate the output frequency of the temperature. It is fabricated in a 0.35 ${\mu}m$ CMOS process with an active area of $240{\mu}m{\times}210{\mu}m$. Current consumption is 600 ${\mu}A$ from a 5 V and the rate of change of the output frequency with temperature shows about ${\pm}1%$.

Compensation algorithm of a voltage transformer considering hysteresis characteristics (히스테리시스 특성을 고려한 전압 변성기 오차 보상 알고리즘)

  • Kang, Yong-Cheol;Zheng, Tai-Ying;Park, Jong-Min;Jang, Sung-Il;Kim, Yong-Guen
    • Proceedings of the KIEE Conference
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    • 2007.11b
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    • pp.12-14
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    • 2007
  • A voltage transformer (VT) is used to transform a high voltage into a low voltage as an input for a metering device or a protection relay. VTs use an iron core which maximizes the flux linkage. The primary current of the VT has non-fundamental components caused by the hysteresis characteristics of the iron core. It causes a voltage drop in the winding impedances resulting in the error of the VT. This paper describes a compensation algorithm for the VT. The proposed algorithm can compensate the secondary voltage of VT by calculating the primary current from the exciting current of the hysteresis loop in the voltage transformer. In this paper, the exciting branch was divided into a non-linear core loss resistor and a non-linear magnetizing inductor. The performance of the proposed algorithm was validated under various conditions using EMTP generated data. Test results show that the proposed compensation algorithm can improve the accuracy of the VT significantly.

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