• Journal of the Korean Solar Energy Society
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• v.38 no.1
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• pp.45-55
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• 2018

Environmentally benign lead-free solder coated ribbon (e. g. SnCu, SnZn, SnBi${\cdots}$) has been intensively studied to interconnect cells without lead mixed ribbon (e. g. SnPb) in the crystalline silicon(c-Si) photovoltaic modules. However, high melting point (> $200^{\circ}C$) of non-lead based solder provokes increased thermo-mechanical stress during its soldering process, which causes early degradation of PV module with it. Hence, we proposed low-temperature conductive paste (CP) based tabbing method for lead-free ribbon. Modules, interconnected by the lead-free solder (SnCu) employing CP approach, exhibits similar output without increased resistivity losses at initial condition, in comparison with traditional high temperature soldering method. Moreover, 400 cycles (2,000 hour) of thermal cycle test reveals that the module integrated by CP approach withstands thermo-mechanical stress. Furthermore, this approach guarantees strong mechanical adhesion (peel strength of ~ 2 N) between cell and lead-free ribbons. Therefore, the CP based tabbing process for lead free ribbons enables to interconnect cells in c-Si PV module, without deteriorating its performance.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.406-406
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• 2016

To get high efficiency n-type crystalline silicon solar cells, passivation is one of the key factor. Tunnel oxide (SiO2) reduce surface recombination as a passivation layer and it does not constrict the majority carrier flow. In this work, the passivation quality enhanced by different chemical solution such as HNO3, H2SO4:H2O2 and DI-water to make thin tunnel oxide layer on n-type crystalline silicon wafer and changes of characteristics by subsequent annealing process and firing process after phosphorus doped amorphous silicon (a-Si:H) deposition. The tunneling of carrier through oxide layer is checked through I-V measurement when the voltage is from -1 V to 1 V and interface state density also be calculated about $1{\times}1012cm-2eV-1$ using MIS (Metal-Insulator-Semiconductor) structure . Tunnel oxide produced by 68 wt% HNO3 for 5 min on $100^{\circ}C$, H2SO4:H2O2 for 5 min on $100^{\circ}C$ and DI-water for 60 min on $95^{\circ}C$. The oxide layer is measured thickness about 1.4~2.2 nm by spectral ellipsometry (SE) and properties as passivation layer by QSSPC (Quasi-Steady-state Photo Conductance). Tunnel oxide layer is capped with phosphorus doped amorphous silicon on both sides and additional annealing process improve lifetime from $3.25{\mu}s$ to $397{\mu}s$ and implied Voc from 544 mV to 690 mV after P-doped a-Si deposition, respectively. It will be expected that amorphous silicon is changed to poly silicon phase. Furthermore, lifetime and implied Voc were recovered by forming gas annealing (FGA) after firing process from $192{\mu}s$ to $786{\mu}s$. It is shown that the tunnel oxide layer is thermally stable.

• Korean Chemical Engineering Research
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• v.57 no.1
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• pp.111-117
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• 2019

This study proposed the fabrication and deposition of high purity crystalline $core-TiO_2/shell-Al_2O_3$ nanoparticles. Morphological properties of $core-TiO_2$ and coated $shell-Al_2O_3$ were confirmed by transmission electron microscope (TEM) and transmission electron microscope - energy dispersive spectroscopy (TEM-EDS). The electrical properties of the prepared $core-TiO_2/shell-Al_2O_3$ nanoparticles were evaluated by applying them to a working electrode of a Dye-Sensitized Solar Cell (DSSC). The particle size, growth rate and the main crystal structure of $core-TiO_2$ were analyzed through dynamic light scattering system (DLS), scanning electron microscope (SEM) and X-ray diffraction (XRD). The $core-TiO_2$, which has a particle size of 17.1 nm, a thin film thickness of $20.1{\mu}m$ and a main crystal structure of anatase, shows higher electrical efficiency than the conventional paste-based dye-sensitized solar cell (DSSC). In addition, the energy conversion efficiency (6.28%) of the dye-sensitized solar cell (DSSC) using the $core-TiO_2/shell-Al_2O_3$ nanoparticles selectively controlled to the working electrode is 26.1% higher than the energy conversion efficiency (4.99%) of the dye-sensitized solar cell (DSSC) using the conventional paste method.

• Journal of the Microelectronics and Packaging Society
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• v.18 no.2
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• pp.57-62
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• 2011

The energy conversion efficiency of DSSCs (Dye-Sensitized Solar Cells) is dependent on the powder size, the structure, and the morphology of $TiO_2$ electrode. The higher efficiency is obtained with high surface area of the nanoanatase-$TiO_2$ powder adsorbed onto a lot more of the dye. Also, the enhancement of light scattering increases the efficiency with high adsorption of the dye. Powder size, crystalline phase, and shape of $TiO_2$ obtained by hydrothermal method have 15-20 nm, anatase and round. $TiO_2$ electrode has fabricated with the mixture of scattering $TiO_2$ particle with 0.4 ${\mu}m$ in nano-sized powder. Conversion efficiency of series of DSSCs was measured with volume fraction of scattering particle. Photovoltaic characteristics of DSSCs with 10% scattering particles are 3.51 mA for Jsc (short circuit current), 0.79 V for Voc(open circuit potential), filling factor 0.619 and 6.86% for efficiency. Jsc was improved by 11% and enhancement of efficiency by 0.77% compared with that of no scattering particles. The confinement of inserted light by light scattering particles has more increase of the injection of exiton(electron-hole pair) and decrease of moving path in electron. Efficiencies of DSSCs with more than 10% for scattering particles have reduced with increasing the pore in the $TiO_2$ electrode.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.15 no.6
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• pp.252-259
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• 2005

Single crystal $CuGaSe_2$ layers were grown on thoroughly etched semi-insulating CaAs(100) substrate at $450^{\circ}C$ with hot wall epitaxy (HWE) system by evaporating $CuGaSe_2$ source at $610^{\circ}C$. The crystalline structure of the single crystal thin films was investigated by the photoluminescence (PL) and double crystal X-ray diffraction (DCXD). The carrier density and mobility of single crystal $CuGaSe_2$ thin films measured with Hall effect by Van der Pauw method are $4.87{\times}10^{17}cm^{-3}$ and $129cm^2/V{\cdot}s$ at 293 K, respectively. The temperature dependence of the energy band gap of the $CuGaSe_2$ obtained from the absorption spectra was well described by the Varshni's relation, $E_g(T)=1.7998eV-(8.7489{\times}10^{-4}eV/K)T^2/(T+335K)$. The voltage, current density of maxiumun power, fill factor, and conversion, efficiency of $n-CdS/p-CuGaSe_2$, heterojunction solar cells under $80mW/cm^2$ illumination were found to be 0.41 V, $21.8mA/cm^2$, 0.75 and 11.17%, respectively.

• Korean Journal of Materials Research
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• v.27 no.10
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• pp.518-523
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• 2017

In commercial solar cells, the pattern of the front electrode is critical to effectively assemble the photo generated current. The power loss in solar cells caused by the front electrode was categorized as four types. First, losses due to the metallic resistance of the electrode. Second, losses due to the contact resistance of the electrode and emitter. Third, losses due to the emitter resistance when current flows through the emitter. Fourth, losses due to the shading effect of the front metal electrode, which has a high reflectance. In this paper, optimizing the number of finger on a $4{\times}4$ solar cell is demonstrated with known theory. We compared the short circuit current density and fill factor to evaluate the power loss from the front metal contact calculation result. By experiment, the short circuit current density($J_{sc}$), taken in each pattern as 37.61, 37.53, and $37.38mA/cm^2$ decreased as the number of fingers increased. The fill factor(FF), measured in each pattern as 0.7745, 0.7782 and 0.7843 increased as number of fingers increased. The results suggested that the efficiency(Eff) was measured in each pattern as 17.51, 17.81, and 17.84 %. Throughout this study, the short-circuit current densities($J_{sc}$) and fill factor(FF) varied according to the number of fingers in the front metal pattern. The effects on the efficiency of the two factors were also investigated.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.29 no.8
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• pp.461-465
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• 2016

n-type silicon shows the better tolerance towards metal impurities with a higher minority carrier lifetime compared to p-type silicon substrate. Due to better lifetime stability as compared to p-type during illumination made the photovoltaic community to switch toward n-type wafers for high efficiency silicon solar cells. We fabricated the front electrode of the n-type solar cell with AgAl paste. The electrodes characteristics of the AgAl paste depend on the contact junction depth that is closely related to the firing temperature. Metal contact depth with p+ emitter, with optimized depth is important as it influence the resistance. In this study, we optimize the firing condition for the effective formation of the metal depth by varying the firing condition. The firing was carried out at temperatures below $670^{\circ}C$ with low contact depth and high contact resistance. It was noted that the contact resistance was reduced with the increase of firing temperature. The contact resistance of $5.99m{\Omega}cm^2$ was shown for the optimum firing temperature of $865^{\circ}C$. Over $900^{\circ}C$, contact junction is bonded to the Si through the emitter, resulting the contact resistance to shunt. we obtained photovoltaic parameter such as fill factor of 76.68%, short-circuit current of $40.2mA/cm^2$, open-circuit voltage of 620 mV and convert efficiency of 19.11%.

• Journal of the Korean Solar Energy Society
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• v.25 no.4
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• pp.1-11
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• 2005

The stoichiometric mixture of evaporating materials for the $CuInSe_2$ single crystal thin film was prepared from horizontal furnace. Using extrapolation method of X-ray diffraction patterns for the polycrystal $CuInSe_2$, it was found tetragonal structure whose lattice constant $a_0$ and $c_0$ were $5.783\;{\AA}$ and $11.621\;{\AA}$, respectively. To obtain the $CuInSe_2$ single crystal thin film, $CuInSe_2$ mixed crystal was deposited on throughly etched GaAs(100) by the HWE(Hot Wall Epitaxy) system. The source and substrate temperature were $620^{\circ}C$ and $410^{\circ}C$ respectively. The crystalline structure of $CuInSe_2$ single crystal thin film was investigated by the double crystal X-ray diffraction(DCXD). Hall effect on this sample was measured by the method of Van der Pauw and studied on carrier density and mobility depending on temperature. From Hall data, the mobility was likely to be decreased by impurity scattering in the temperature range 30 K to 100 K and by lattice scattering in the temperature range 100 K to 293 K. The temperature dependence of the energy band gap of the $CuInSe_2$ obtained from the absorption spectra was well described by the Varshni's relation, $E_g(T)=1.1851\;eV-(8.99{\times}10^{-4}\;eV/K)T^2/(T+153\;K)$. The open-circuit voltage, short current density, fill factor, and conversion efficiency of $n-CdS/p-CuGaSe_2$ heterojunction solar cells under $80\;mW/cm^2$ illumination were found to be 0.51V, $29.3\;mA/cm^2$, 0.76 and 14.3 %, respectively.

• Journal of the Korean Solar Energy Society
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• v.38 no.1
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• pp.25-36
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• 2018

The stoichiometric mixture of evaporating materials for the $CaAl_2Se_4$: Co single crystal thin film was prepared from horizontal furnace. Using extrapolation method of X-ray diffraction patterns for the polycrystal $CaAl_2Se_4$, it was found orthorhomic structure whose lattice constant $a_0$, $b_0$ and $c_0$ were 6.4818, $11.1310{\AA}$ and $11.2443{\AA}$, respectively. To obtain the $CaAl_2Se_4$: Co single crystal thin film, $CaAl_2Se_4$: Co mixed crystal was deposited on throughly etched Si (100) by the HWE (Hot Wall Epitaxy) system. The source and substrate temperature were $600^{\circ}C$ and $440^{\circ}C$ respectively. The crystalline structure of $CaAl_2Se_4$: Co single crystal thin film was investigated by the double crystal X-ray diffraction (DCXD). Hall effect on this sample was measured by the method of Van der Pauw and studied on carrier density and mobility depending on temperature. From Hall data, the mobility was likely to be decreased by impurity scattering in the temperature range 30 K to 100 K and by lattice scattering in the temperature range 100 K to 293 K. The temperature dependence of the energy band gap of the $CaAl_2Se_4$: Co obtained from the absorption spectra was well described by the Varshni's relation, $E_g(T)=3.8239eV-(4.9823{\times}10^{-3}eV/K)T_2/(T+559K)$. The open-circuit voltage, short current density, fill factor, and conversion efficiency of $p-Si/p-CaAl_2Se_4$: Co heterojunction solar cells under $80mW/cm^2$ illumination were found to be 0.42 V, $25.3mA/cm^2$, 0.75 and 9.96%, respectively.

• Korean Journal of Materials Research
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• v.22 no.4
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• pp.190-194
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• 2012

The formation of high-quality polycrystalline silicon (poly-Si) on relatively low cost substrate has been an important issue in the development of thin film solar cells. Poly-Si seed layers were fabricated by an inverse aluminum-induced crystallization (I-AIC) process and the properties of the resulting layer were characterized. The I-AIC process has an advantage of being able to continue the epitaxial growth without an Al layer removing process. An amorphous Si precursor layer was deposited on Corning glass substrates by RF magnetron sputtering system with Ar plasma. Then, Al thin film was deposited by thermal evaporation. An $SiO_2$ diffusion barrier layer was formed between Si and Al layers to control the surface orientation of seed layer. The crystallinity of the poly-Si seed layer was analyzed by Raman spectroscopy and x-ray diffraction (XRD). The grain size and orientation of the poly-Si seed layer were determined by electron back scattering diffraction (EBSD) method. The prepared poly-Si seed layer showed high volume fraction of crystalline Si and <100> orientation. The diffusion barrier layer and processing temperature significantly affected the grain size and orientation of the poly Si seed layer. The shorter oxidation time and lower processing temperature led to a better orientation of the poly-Si seed layer. This study presents the formation mechanism of a poly seed layer by inverse aluminum-induced crystallization.