• Title/Summary/Keyword: coupling circuit

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Design of Multiband Octa-Phase LC VCO for SDR (SDR을 위한 다중밴드 Octa-Phase LC 전압제어 발진기 설계)

  • Lee, Sang-Ho;Han, Byung-Ki;Lee, Jae-Hyuk;Kim, Hyeong-Dong
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.44 no.7 s.361
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    • pp.7-11
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    • 2007
  • This paper presents a multiband octa-phase LC VCO for SDR receiver. Four identical LC VCOs are connected by using series coupling transistor to obtain the octa-phase signal and low phase noise characteristic. For a multiband application, a band tuning circuit that consists of a switch capacitor circuit and two MOS varactors is proposed. As the MOS switch is on/off state, the frequency range will be varied. In addition, two varactors make the VCO be immune to process variation of the oscillation frequency. The VCO is designed in 0.18-um CMOS technology, consumes 12mA current from 1.8V supply voltage and operates with a frequency band from 885MHz to 1.342GHz (41% tuning range). As driving sub-harmonic mixer, the proposed VCO covers 3 standards(CDMA 2000 1x, WCDMA, WiBro). The measured phase noise is -105dBc@100kHz, -115dBc@1MHz, -130dBc@10MHz for CDMA 2000 1x, WCDMA, WiBro respectively.

A UWB Antenna with the Adjustable Second Rejection Band Using a SIR (SIR을 이용한 제 2저지 대역 제어 가능 UWB 안테나)

  • Choi, Hyung-Seok;Choi, Kyung;Hwang, Hee-Yong
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.23 no.9
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    • pp.1019-1024
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    • 2012
  • In this paper, a UWB antenna using a SIR(Step Impedance Resonator) that eliminate signal interference at 5 GHz WLAN as the first rejection band and adjust the second rejection band is proposed. Unlike the unit impedance resonator, the second harmonic of SIR is decided according to step impedance. Therefore, To adjust the second rejection band, SIR is applied to UWB antenna. Also, the equivalent circuit of the antenna at first rejection band is presented and the equivalent modeling values of the SIR and the coupling value is obtained. The proposed antenna is satisfied to cover full UWB band with return losses less than -10 dB and has band rejection characteristic in 5 GHz WLAN band. The radiation patterns show +y directivity characteristics in H-plane and the group delay variations are within 1.0 ns.

Effects of the Dielectric Constant and Thickness of a Feed Substrate on the Characteristics of an Aperture Coupled Microstrip Patch Antenna (급전 기판의 유전상수 및 두께가 개구면 결합 마이크로스트립 패치 안테나의 특성에 미치는 영향)

  • Bak, Hye-Lin;Koo, Hwan-Mo;Kim, Boo-Gyoun
    • Journal of the Institute of Electronics and Information Engineers
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    • v.51 no.7
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    • pp.49-59
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    • 2014
  • Effects of the dielectric constant and thickness of a feed substrate on the bandwidth and radiation characteristics of an aperture coupled microstrip patch antenna (ACMPA) are investigated. The optimized return loss bandwidth of an ACMPA increases without the degradation of radiation characteristics as the feed substrate dielectric constant increases for the same feed substrate thickness. The optimized return loss bandwidth of an ACMPA with the dielectric constant of a feed substrate of 10, which is compatible with the high dielectric constant monolithic microwave integrated circuit (MMIC) materials, increases without the degradation of radiation characteristics as the thickness of a feed substrate decreases. The ACMPA configuration is suitable for integration with MMICs.

13.56 MHz Wireless Power Transfer System Using Loop Antennas with Tunable Impedance Matching Circuit (가변 임피던스 정합 회로를 갖는 루프 안테나를 이용한 13.56 MHz 무선 전력 전송 시스템)

  • Won, Do-Hyun;Kim, Hee-Seung;Jang, Byung-Jun
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.21 no.5
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    • pp.519-527
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    • 2010
  • In this paper, we proposed a 13.56 MHz wireless power transfer system using loop antennas with tunable impedance matching circuits. In general, a wireless power transfer system shows an impedance mismatching due to a reflected impedance, because a coupling coefficient is varied with respect to separation distance between two resonating antennas. The proposed system can compensate the effect of this impedance mismatch owing to tunable impedance matching circuits using varactor diodes. Therefore, transmission efficiency is enhanced, moreover, the center frequency of the system is not changed, regardless of separation distance between two antennas. In order to demonstrate the performance of the proposed system, a wireless power transfer system with tunable impedance matching circuits is designed and implemented, which has a pair of loop antennas with a dimension of $30\;cm{\times}30\;cm$ cm. The input return loss, coupling coefficient, efficiency, and input impedance variation with respect to a distance between loop antennas were measured. From measured results, the proposed system shows enhanced performances than the case of the general fixed $50\;{\Omega}$ impedance matching circuits. Therefore, we verified that the proposed wireless power transfer system using the proposed impedance matching scheme will be able to ensure robust operation even when the separation distance of antennas is varied.

New Design Method of Wireless Power Transfer System Using Loop Antennas (루프 안테나를 이용한 무선 전력 전송 시스템의 새로운 설계법)

  • Kim, Hee-Seung;Won, Do-Hyun;Lim, Jae-Bong;Jang, Byung-Jun
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.21 no.1
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    • pp.36-45
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    • 2010
  • In this paper, we propose a new design method to design a wireless power transfer system using loop antennas for consumer electronics. This method can simply design a wireless power transfer system only using measurements of coupling coefficients and simple equations of equivalent circuit model about loop antennas without complicated electromagnetic analysis. Using the proposed design method, a wireless power transfer system with a pair of loop antennas operating at the frequency of 13.56 MHz, which have a dimension of $50{\times}50\;cm^2$, is designed and implemented. The input return loss, coupling coefficient, efficiency, and input impedance variation with respect to a distance between loop antennas were measured. The proposed design method provides good agreements between measured and predicted results. Also, the wireless power transfer system with impedance matching circuits designed by the proposed design method shows two times higher efficiency characteristics than the case with the general $50\;{\Omega}$ impedance matching circuits. Therefore, we verified that our design method could be an effective tool to design a wireless power transfer system.

Miniaturized Multilayer Band Pass Chip filter for IMT-2000 (IMT-2000용 초소헝 적층형 대역 통과 칩 필터 설계 및 제작)

  • Lim Hyuk;Ha, Jong-Yoon;Sim, Sung-Hun;Kang, Chong-Yun;Choi, Ji-Won;Choi, Se-Young;Oh, Young-Jei;Kim, Hyun-Jai;Yoon, Seok-Jin
    • Journal of the Korean Ceramic Society
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    • v.40 no.10
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    • pp.961-966
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    • 2003
  • A Multi-Layer Ceramic (MLC) chip type Band-Pass Filter (BPF) using BiNb$\_$0.975/Sb$\_$0.025/ $O_4$ LTCC (Low Temperature Co-fired Ceramics) and MLC processing is presented. The MLC chip BPF has the benefits of low cost and small size. The BPF consists of coupled stripline resonators and coupling capacitors. The BPF is designed to have an attenuation pole at below the passband for a receiver band of IMT-2000 handset. The computer-aided design technology is applied for analysis of the BPF frequency characteristics. The attenuation pole depends on the coupling between resonators and the coupling capacitance. An equivalent circuit and structure of MLC chip BPF are proposed. The frequency characteristics of the manufactured BPF is well acceptable for IMT-2000 application.

An Efficient Built-in Self-Test Algorithm for Neighborhood Pattern- and Bit-Line-Sensitive Faults in High-Density Memories

  • Kang, Dong-Chual;Park, Sung-Min;Cho, Sang-Bock
    • ETRI Journal
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    • v.26 no.6
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    • pp.520-534
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    • 2004
  • As the density of memories increases, unwanted interference between cells and the coupling noise between bit-lines become significant, requiring parallel testing. Testing high-density memories for a high degree of fault coverage requires either a relatively large number of test vectors or a significant amount of additional test circuitry. This paper proposes a new tiling method and an efficient built-in self-test (BIST) algorithm for neighborhood pattern-sensitive faults (NPSFs) and new neighborhood bit-line sensitive faults (NBLSFs). Instead of the conventional five-cell and nine-cell physical neighborhood layouts to test memory cells, a four-cell layout is utilized. This four-cell layout needs smaller test vectors, provides easier hardware implementation, and is more appropriate for both NPSFs and NBLSFs detection. A CMOS column decoder and the parallel comparator proposed by P. Mazumder are modified to implement the test procedure. Consequently, these reduce the number of transistors used for a BIST circuit. Also, we present algorithm properties such as the capability to detect stuck-at faults, transition faults, conventional pattern-sensitive faults, and neighborhood bit-line sensitive faults.

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Design of a High Power Frequency Tuneable Resonator for Wireless Power Transfer (무선 전력 전송용 고출력 주파수 가변 공진기 설계)

  • Park, Jaesu;Choi, Jaehoon
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.24 no.3
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    • pp.352-355
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    • 2013
  • In this paper, a high power tuneable resonator for a wireless power transfer system based on magnetic resonance is proposed. A spiral structure is used for a self-resonant coil and tuneable trimmer capacitors are added at the edges of resonant coils such that the frequency can be easily tuned. 3D simulation tools and equivalent circuit modeling method are used for predicting self-resonant frequency and scattering parameters according to the change of capacitor values. From the measurement of the prototype WPT system, the resonant frequency could be controlled from 3.0 MHz to 4.5 MHz and the transmission efficiency way over 50 % when the distance between transmitting coil and receiving coil was 160 mm.

Design and Implementation of Solar PV for Power Quality Enhancement in Three-Phase Four-Wire Distribution System

  • Guna Sekar, T.;Anita, R.
    • Journal of Electrical Engineering and Technology
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    • v.10 no.1
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    • pp.75-82
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    • 2015
  • This paper presents a new technique for enhancing power quality by reducing harmonics in the neutral conductor. Three-Phase Four-Wire (3P4W) system is commonly used where single and three phase loads are connected to Point of Common Coupling (PCC). Due to unbalance loads, the 3P4W distribution system becomes unbalance and current flows in the neutral conductor. If loads are non-linear, then the harmonic content of current will flow in neutral conductor. The neutral current that may flow towards transformer neutral point is compensated by using a series active filter. In order to reduce the harmonic content, the series active filter is connected in series with the neutral conductor by which neutral and phase current harmonics are reduced significantly. In this paper, solar PV based inverter circuit is proposed for compensating neutral current harmonics. The simulation is carried out in MATLAB/SIMULINK and also an experimental setup is developed to verify the effectiveness of the proposed method.

Design Guidelines for a Capacitive Wireless Power Transfer System with Input/Output Matching Transformers

  • Choi, Sung-Jin
    • Journal of Electrical Engineering and Technology
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    • v.11 no.6
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    • pp.1656-1663
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    • 2016
  • A capacitive wireless power transfer (C-WPT) system uses an electric field to transmit power through a physical isolation barrier which forms a pair of ac link capacitors between the metal plates. However, the physical dimension and low dielectric constant of the interface medium severely limit the effective link capacitance to a level comparable to the main switch output capacitance of the transmitting circuit, which thus narrows the soft-switching range in the light load condition. Moreover, by fundamental limit analysis, it can be proved that such a low link capacitance increases operating frequency and capacitor voltage stress in the full load condition. In order to handle these problems, this paper investigates optimal design of double matching transformer networks for C-WPT. Using mathematical analysis with fundamental harmonic approximation, a design guideline is presented to avoid unnecessarily high frequency operation, to suppress the voltage stress on the link capacitors, and to achieve wide ZVS range even with low link capacitance. Simulation and hardware implementation are performed on a 5-W prototype system equipped with a 256-pF link capacitance and a 200-pF switch output capacitance. Results show that the proposed scheme ensures zero-voltage-switching from full load to 10% load, and the switching frequency and the link capacitor voltage stress are kept below 250 kHz and 452 V, respectively, in the full load condition.