• Journal of the Korean institute of surface engineering
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• v.38 no.1
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• pp.28-36
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• 2005

In this study, the reflow characteristics of copper thin films which is expected to be used as interconnection materials in the next generation semiconductor devices were investigated. Cu thin films were deposited on the TaN diffusion barrier by metal organic chemical vapor deposition (MOCVD) and annealed at the temperature between 250℃ and 550℃ in various ambient gases. When the Cu thin films were annealed in the hydrogen ambience compared with oxygen ambience, sheet resistance of Cu thin films decreased and the breakdown of TaN diffusion barrier was not occurred and a stable Cu/TaN/Si structure was formed at the annealing temperature of 450℃. In addition, reflow properties of Cu thin films could be enhanced in H₂ ambient. With Cu reflow process, we could fill the trench patterns of 0.16～0.24 11m with aspect ratio of 4.17～6.25 at the annealing temperature of 450℃ in hydrogen ambience. It is expected that Cu reflow process will be applied to fill the deep pattern with ultra fine structure in metallization.

• Proceedings of the Materials Research Society of Korea Conference
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• 1995.11a
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• pp.41-41
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• 1995

• 한국전기화학회:학술대회논문집
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• 1999.04a
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• pp.58-58
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• 1999

• Korean Journal of Materials Research
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• v.14 no.8
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• pp.552-557
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• 2004

Thin Ni-B films, 1 ${\mu}m$ thick, were electrolessly deposited on Cu bus electrode fabricated by electro deposition. The purpose of these films is to encapsulate Cu electrodes for preventing Cu oxidation and to serve as a diffusion barrier against copper contamination of dielectric layer in AC-plasma display panel. The layers were heat treated at $580^{\circ}C$(baking temperature of dielectric layer) with and without pre-annealing at $300^{\circ}C$($Ni_{3}B$ formation temperature) for 30 minutes. In the layer with pre-annealing, amount of Cu diffusion was lower about 5 times than that in the layer without pre-annealing. The difference of Cu concentration could be attributed to Cu diffusion before $Ni_{3}B$ formation at grain boundaries. However, the diffusion behavior of the layer with pre-annealing was similar to that of the layer without pre-annealing after $Ni_{3}B$ formation. With increasing annealing time, Cu concentration of both layers increased due to grain growth.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.08a
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• pp.214.2-214.2
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• 2013

Device performance for the 45 and 32 nm node CMOS technology requires the integration of ultralow-k materials. To lower the dielectric constant for PECVD and spin-on materials, partial replacement of the solid network with air (k=1.01) appears to be more intuitive and direct option. This can be achieved introducting of second "labile" phase during depositoin that is removed during a subsequent UV curing and annealing step. Besides, with shrinking line dimensions the resistivity of barrier films cannot meet the International Technology Roadmap for Semiconductors (ITRS) requirements. To solve this issue self-forming diffusion barriers have drawn attention for great potential technique in meeting all ITRS requirments. In this present work, we report a Cu-V alloy as a materials for the self-forming barrier process. And we investigated diffusion barrier properties of self-formed layer on low-k dielectrics with or without UV curing treatment. Cu alloy films were directly deposited onto low-k dielectrics by co-sputtering, followed by annealing at various temperatures. X-ray diffraction revealed Cu (111), Cu (200) and Cu (220) peaks for both of Cu alloys. The self-formed layers were investigated by transmission electron microscopy. In order to compare barrier properties between V-based interlayer on low-k dielectric with UV curing and interlayer on low-k dielectric without UV curing, thermal stability was measured with various heat treatment temperature. X-ray photoelectron spectroscopy analysis showed that chemical compositions of self-formed layer. The compositions of the V based self-formed barriers after annealing were strongly dominated by the O concentration in the dielectric layers.

• Journal of the Korean Electrochemical Society
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• v.10 no.2
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• pp.94-103
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• 2007

The transition of interconnection metal from aluminum alloy to copper has been introduced to meet the requirements of high speed, ultra-large scale integration, and high reliability of the semiconductor device. Since copper, which has low electrical resistivity and high resistance to degradation, has different electrical and material characteristics compared to aluminum alloy, new related materials and processes are needed to successfully fabricate the copper interconnection. In this review, some important factors of multilevel copper damascene process have been surveyed such as diffusion barrier, seed layer, organic additives for bottom-up electro/electroless deposition, chemical mechanical polishing, and capping layer to introduce the related issues and recent research trends on them.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2004.11a
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• pp.27-27
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• 2004

• Journal of the Korean Vacuum Society
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• v.18 no.3
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• pp.203-207
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• 2009

Copper is known as a replacement for aluminum wire which is used for semiconductor. Because specific resistance of Cu ($1.67{\mu}{\Omega}$-cm) is lower than that of Al ($2.66{\mu}{\Omega}$-cm), Cu reduce RC delay time. Although melting point of Cu($1085^{\circ}C$) is higher than melting point of Al, Cu have characteristic to easily react with Silicon(Si) in low temperature, and it isn't good at adhesive strength with Si. For above these reason, research of diffusion barrier to prevent reaction between Cu and Si and to raise adhesive strength is steadily advanced. Our study group have researched on W-C-N (tungsten-carbon-nitrogen) Diffusion barrier for preventing diffusion of Cu through semiconductor. By recent studies, It's reported that W-C-N diffusion barrier can even precent Cu and Si diffusing effectively at high temperature. In this treatise, we vaporized different proportion of N into diffusion barrier to research Cu's Electromigration based on the results and studied surface hardness in the heat process using nano scale indentation system. We gain that diffusion barrier containing nitrogen is more stable for Cu's electromigration and has stronger surface hardness in heat treatment process.

• Journal of the Korean institute of surface engineering
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• v.23 no.3
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• pp.173-182
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• 1990

In order to prevent the thermal and enviromenatal degradation of contact materials a nickel layer was plated as an undercoat of gold plating on the surface phosphorous bronze. The thickness of nikel and gold coating and chemical resistance of the coatings were measured at various conditions. Variation of morphology and chemical composition was studied by SEM, EDS and ESCA, respectively. Nickel layer was found to act as a thermal diffusion barrier and to retard the diffusion of copper from substrate to gold coating in the temperature $200^{\circ}C$~$400^{\circ}C$. below $200^{\circ}C$gold coated contacts showed a stable and low contanct resistance, while above $200^{\circ}C$ rapid diffusion of copper formed copper oxide on the surface layer and raised the contact resistance. With the nickel thinkness of abount 5$\mu$m as an undercoat the gold thinkness of $0.5\mu$m, showed satistactory (less than 1 m$\Omega$) contact resistance below 20$0^{\circ}C$ and corresponding gold thinkness increased to 1.0 m at $300^{\circ}C$~$400^{\circ}C$.

• Proceedings of the Korean Society Of Semiconductor Equipment Technology
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• 2005.05a
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• pp.139-145
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• 2005

In the study, in order to deposit TaN thin film using diffusion barrier and bottom electrode we made the Plasma Assisted ALD equipment and confirmed the electrical characteristic of TaN thin films deposited PAALD method, PAALD equipment depositing TaN thin film using PEMAT(pentakis(ethylmethlyamlno) tantalum) Precursor and $NH_3$ reaction gas is aware that TaN thin film deposited of high density and amorphous phase with XRD measurement The degree of diffusion and react ion taking place in Cu/TaN(deposited using 150 W PAALD)/$SiO_2$/Si systems with increasing annealing temperature was estimated from MOS capacitor property and the $SiO_2(600\;\AA)$/Si system surface analysis by C-V measurement and secondary ion material spectrometer(SIMS) after Cu/TaN/$SiO_2(400\;\AA)$ system etching. TaN thin film deposited PAALD method diffusion barrier have a good diffusion barrier property up to $500^{\circ}C$.