• Title/Summary/Keyword: converter optimization

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Modeling and Simulation of LED Driver (LED driver 모델링 및 시뮬레이션에 관한 연구)

  • Han, Soo-Bin;Park, Suck-In;Song, Eu-Gine;Jeoung, Hak-Geun;Jung, Bong-Man;You, Sung-Won
    • Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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    • 2008.10a
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    • pp.113-115
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    • 2008
  • This paper shows the method of modeling and simulation of LED driver circuit. Simplified LED modeling is introduced and a driver IC, HV9910, is modeled by implementing the major function blocks. Circuit of buck type converter is constructed for simulation. Simulation includes the internal function of IC and various performances such as LED array current control and dimming. This results show that simulation approach is valid for circuit optimization and reduction of development time.

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Isolated Topologies of Switched-Resonator Converters

  • Jabbari, Masoud;Farzanehfard, Hosein;Shahgholian, Ghazanfar
    • Journal of Power Electronics
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    • v.10 no.2
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    • pp.125-131
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    • 2010
  • Switched-resonator converters are a new family of soft switching DC-DC converters where the energy is transferred via a resonator. This paper introduces some isolated topologies of this family. The achieved advantages include, load independent soft-switching, self short-circuit protection, and optimization capability due to topology variety. Compared to conventional series-resonant converters, outstanding advantages such as a smaller fewer number of switches and diodes, a smaller transformer, and lower current stresses are achieved. A general synthesis scheme, functional topologies, and essential relations are included. Experimental results from a laboratory prototype confirm the presented theoretical analysis.

CC-CV Optimization for 3-Phase Full-Bridge Converter for Battery Pack Testing System (배터리 팩 시험기 용 3상 양방향 풀브릿지 컨버터 CC-CV 제어 최적 설계)

  • Kwon, Yong-Hoon;seong, Ho-Jae;Hyun, Seung-Wook;Won, Chung-Yuen
    • Proceedings of the KIPE Conference
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    • 2017.07a
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    • pp.443-444
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    • 2017
  • 본 논문에서는 배터리 팩 시험기에 사용되는 토폴로지인 3상 양방향 풀 브릿지 컨버터의 CC-CV 최적 설계에 대해 제안한다. 대용량 배터리 팩 시험기를 구성하는 소자들은 높은 정격이 요구되고 그에 따라 부피가 커지는 단점이 있다. 이러한 단점을 3상 양방향 풀 브릿지 컨버터를 사용하여 보완을 할 수 있지만 까다로운 회로 해석이 요구된다. 이 배터리 팩 시험기에 사용되는 복잡한 토폴로지를 스위칭 방식에 따라 간단하게 모델링하고, 그에 맞게 정전류 및 정전압 제어 시뮬레이션을 수행하여 얻은 결과를 통해 타당성을 검증하였다.

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Design Optimization of Bi-directional Dual Active Bridge DC/DC Converter for Solid State Transformer (Solid State Transformer를 위한 양방향 Dual Active Bridge DC/DC 컨버터 최적 설계)

  • Choi, Hyun-Jun;Park, Hwa-Pyeong;Jung, Jee-Hoon
    • Proceedings of the KIPE Conference
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    • 2014.07a
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    • pp.197-198
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    • 2014
  • 본 논문에서는 양방향 DC-DC Dual Active Bridge (DAB) 컨버터의 수학적 모델로부터 컨버터의 변압기와 결합 인덕터의 최적 설계 방법을 제안한다. DAB컨버터는 1차 측과 2차 측이 동일한 구조를 가진 고효율 절연형 컨버터로써, Soft Switching이 쉽게 구현되고, 양방향으로 Power를 전달 할 수 있는 장점으로 널리 사용되고 있다. 본 논문에서 제안하는 컨버터는 Solid State Transformer (SST) 용으로 변압기 1차 측과 2차 측의 턴 비가 동일한 구조로써, 최대의 ZVS영역을 확보하고, 전력 변환 효율을 극대화 할 수 있다. 3.3 kW급 시제품을 제작하여 제안하는 컨버터의 타당성을 검증하고자 한다.

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SSCI Mitigation of Series-compensated DFIG Wind Power Plants with Robust Sliding Mode Controller using Feedback Linearization

  • Li, Penghan;Xiong, Linyun;Wang, Jie;Ma, Meiling;Khan, Muhammad Waseem
    • Journal of Power Electronics
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    • v.19 no.2
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    • pp.569-579
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    • 2019
  • A robust controller is designed based on feedback linearization and sliding mode control to damp sub-synchronous control interaction (SSCI) in doubly fed induction generator (DFIG) wind power plants (WPPs) interfaced with the grid. A feedback-linearized sliding mode controller (FLSMC) is developed for the rotor-side converter (RSC) through feedback linearization, design of the sliding mode controller, and parameter tuning with the use of particle swarm optimization. A series-compensated 100-MW DFIG WPP is adopted in simulation to evaluate the effectiveness of the designed FLSMC at different compensation degrees and wind speeds. The performance of the designed controller in damping SSCI is compared with proportional-integral controller and conventional sub-synchronous resonance damping controller. Besides the better damping capability, the proposed FLSMC enhances robustness of the system under parameter variations.

A Study on Optimal Design of Capacitance for Active Power Decoupling Circuits (능동 전력 디커플링 회로의 커패시턴스 최적 설계에 관한 연구)

  • Baek, Ki-Ho;Park, Sung-Min;Chung, Gyo-Bum
    • The Transactions of the Korean Institute of Power Electronics
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    • v.24 no.3
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    • pp.181-190
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    • 2019
  • Active power decoupling circuits have emerged to eliminate the inherent second-order ripple power in a single-phase power conversion system. This study proposes a design method to determine the optimal capacitance for active power decoupling circuits to achieve high power density. Minimum capacitance is derived by analyzing ripple power in a passive power decoupling circuit, a buck-type circuit, and a capacitor-split-type circuit. Double-frequency ripple power decoupling capabilities are also analyzed in three decoupling circuits under a 3.3 kW load condition for a battery charger application. To verify the proposed design method, the performance of the three decoupling circuits with the derived minimum capacitance is compared and analyzed through the results of MATLAB -Simulink and hardware-in-the-loop simulations.

Acousto-optic generation of orbital angular momentum states of light in a tapered optical fiber

  • Song, Changkeun;Park, Hee Su;Song, Kwang Yong;Kim, Byoung Yoon
    • Current Applied Physics
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    • v.18 no.11
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    • pp.1441-1446
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    • 2018
  • We demonstrate an acousto-optic mode converter based on a tapered optical fiber to efficiently generate orbital angular momentum states of light. In our scheme an acoustic wave is deployed to the waist of tapered optical fiber where two degenerate $HE_{21}$ modes leading to +1 and -1 orbital angular momentum eigen-modes are resonantly excited. The excitation of $TM_{01}$ and $TE_{01}$ modes is suppressed by enlarging the intermodal index difference between near-degenerate spatial modes. Numerical calculation for optimization of the taper diameter is provided. The experimental characterization of generated states is performed by analyzing the output far-field pattern and the spatial interference fringes with a uniform reference beam.

Light-load Efficiency Optimization Control Strategy for Active Clamp Forward Converter (액티브 클램프 포워드 컨버터에 적용 가능한 경부하 효율 최적화 제어 기법)

  • Kim, Dongmin;Lee, Young-Dal;Kim, Chong-Eun;Moon, Gun-Woo
    • Proceedings of the KIPE Conference
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    • 2020.08a
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    • pp.142-144
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    • 2020
  • 본 논문은 액티브 클램프 포워드 컨버터(ACFC)에 적용 가능한 경부하 조건 효율 최적화 제어 기법을 제안한다. 기존의 액티브 클램프 포워드 컨버터는 경부하 조건에서 과도한 프리휠링 전류로 인해 큰 도통 손실이 발생하여 높은 효율을 기대하기가 어렵다. 제안하는 제어 방식은 복잡한 추가 회로 없이도 전도 손실을 줄이면서 경부하 효율을 유의미하게 개선할 수 있다. 제안하는 제어 방식의 실현 가능성 및 성능은 범용 AC 입력 및 65W 최대 출력에서 설계된 USB PD 어댑터 프로토타입 회로 구성을 통하여 실험 검증된다.

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Compiler triggered C level error check (컴파일러에 의한 C레벨 에러 체크)

  • Zheng, Zhiwen;Youn, Jong-Hee M.;Lee, Jong-Won;Paek, Yun-Heung
    • The KIPS Transactions:PartA
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    • v.18A no.3
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    • pp.109-114
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    • 2011
  • We describe a technique for automatically proving compiler optimizations sound, meaning that their transformations are always semantics-preserving. As is well known, IR (Intermediate Representation) optimization is an important step in a compiler backend. But unfortunately, it is difficult to detect and debug the IR optimization errors for compiler developers. So, we introduce a C level error check system for detecting the correctness of these IR transformation techniques. In our system, we first create an IR-to-C converter to translate IR to C code before and after each compiler optimization phase, respectively, since our technique is based on the Memory Comparison-based Clone(MeCC) detector which is a tool of detecting semantic equivalency in C level. MeCC accepts only C codes as its input and it uses a path-sensitive semantic-based static analyzer to estimate the memory states at exit point of each procedure, and compares memory states to determine whether the procedures are equal or not. But MeCC cannot guarantee two semantic-equivalency codes always have 100% similarity or two codes with different semantics does not get the result of 100% similarity. To increase the reliability of the results, we describe a technique which comprises how to generate C codes in IR-to-C transformation phase and how to send the optimization information to MeCC to avoid the occurrence of these unexpected problems. Our methodology is illustrated by three familiar optimizations, dead code elimination, instruction scheduling and common sub-expression elimination and our experimental results show that the C level error check system is highly reliable.

Identification of Thermal Flow Boundary Conditions for Three-way Catalytic Converter Using Optimization Techniques (최적화 기법을 이용한 삼원촉매변환기의 열유동 경계조건의 동정)

  • Baek, Seok-Heum;Choi, Hyun-Jin;Kim, Kwang-Hong;Cho, Seok-Swoo
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.11 no.9
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    • pp.3125-3134
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    • 2010
  • Three-way catalyst durability in the Korea requires 5 years/80,000km in 1988 but require 10 years/120,000km after 2002. Domestic three-way catalyst satisfies exhaust gas conversion efficiency or pressure drop etc. but don't satisfy thermal durability. Three-way catalyst maintains high temperature in interior domain but maintain low temperature on outside surface. This study evaluated thermal durability of three-way catalyst by thermal flow and structure analysis and the procedure is as followings. Thermal flow parameters ranges were determined by vehicle test and basic thermal flow analysis. Response surface for rear catalyst temperature was constructed using the design of experiment (DOE) for thermal flow parameters. Thermal flow parameters for rear catalyst temperature in vehicles examination were predicted by desirability function. Temperature distribution of three-way catalyst was estimated by thermal flow analysis for predicted thermal flow parameters.