• Title/Summary/Keyword: converter optimization

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Battery integrated PV DC-Module for power optimization in PV-Battery Hybrid generation system (태양광-배터리 복합발전시스템의 전력 최적화를 위한 배터리 집적형 PV-DC 모듈)

  • Choi, Cheul-Woong;Choi, Bong-Yeon;Noh, Yong-Su;Ji, Young-Hyok;Lee, Byoung-Kuk;Won, Chung-Yuen
    • Proceedings of the KIPE Conference
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    • 2012.11a
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    • pp.147-148
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    • 2012
  • Recently, hybrid generation systems combine multiple energy sources or storage components to optimize the characteristics of the individual energy sources. In this paper, a battery integrated PV power optimizer for PV-battery hybrid power generation system is proposed. PV system using proposed topology can easily increase battery capacity and remove high power bidirectional converter to control bulky battery bank.

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A Research on the Optimization of Turbocharging System in a Medium Speed Diesel Engine (중형 디젤엔진의 터보챠저 과급 시스템 최적화에 관한 연구)

  • Youn Wook-Hyun;Gal Sang-Hak;Ha Ji-Soo;Kim Ho-Ick;Kim Ju-Tae;Kim Ki-Doo
    • Journal of Advanced Marine Engineering and Technology
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    • v.28 no.7
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    • pp.1138-1144
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    • 2004
  • In order to improve engine performance while overcoming the weak points of Pulse and MPC(Modular Pulse Converter) turbocharging system, a new turbocharging system. "Hi-Pulse system", has been introduced and developed for medium speed diesel engine. HYUNDAI HiMSEN engines. Hi-Pulse system is to utilize not only the benefits of MPC system at higher load but also the ones of Pulse system at lower load. As for the results. the specific fuel oil consumption and NOx emission were lowered compared with the Pulse and MPC system. Performance simulation were carried out to optimize intake and exhaust timing and exhaust duct arrangement and to improve the performance of Hi-Pulse system engine.em engine.

Tutorial: Design and Optimization of Power Delivery Networks

  • Lee, Woojoo
    • IEIE Transactions on Smart Processing and Computing
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    • v.5 no.5
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    • pp.349-357
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    • 2016
  • The era of the Internet of Things (IoT) is upon us. In this era, minimizing power consumption becomes a primary concern for system-on-chip designers. While traditional power minimization and dynamic power management (DPM) techniques have been heavily explored to improve the power efficiency of devices inside very large-scale integration (VLSI) platforms, there is one critical factor that is often overlooked, which is the power conversion efficiency of a power delivery network (PDN). This paper is a tutorial that focuses on the power conversion efficiency of the PDN, and introduces novel methods to improve it. Circuit-, architecture-, and system-level approaches are presented to optimize PDN designs, while case studies for three different VSLI platforms validate the efficacy of the introduced approaches.

A Study on 600 V Super Junction Power MOSFET Optimization and Characterization Using the Deep Trench Filling (Deep Trench Filling 기술을 적용한 600 V급 Super Junction Power MOSFET의 최적화 특성에 관한 연구)

  • Lee, Jung-Hoon;Jung, Eun-Sik;Kang, Ey-Goo
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.25 no.4
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    • pp.270-275
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    • 2012
  • Power MOSFET(metal oxide silicon field effect transistor) operate voltage-driven devices, design to control the large power switching device for power supply, converter, motor control, etc. But on-resistance characteristics depending on the increasing breakdown voltage spikes is a problem. So 600 V planar power MOSFET compare to 1/3 low on-resistance characteristics of super junction MOSFET structure. In this paper design to 600 V planar MOSFET and super junction MOSFET, then improvement of comparative analysis breakdown voltage and resistance characteristics. As a result, super junction MOSFET improve on about 40% on-state voltage drop performance than planar MOSFET.

An optimization approach for generation rescheduling with VSC-MTDC and battery energy storage systems (VSC-MTDC와 BESS 통합 시스템을 통한 발전기 리스케줄링 최적화 기법)

  • Kim, Ho-Young;Kim, Mun-Kyeom
    • Proceedings of the KIEE Conference
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    • 2015.07a
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    • pp.147-148
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    • 2015
  • 현재 발전기 스케줄링은 제한된 발전 자원, 에너지 수요 및 연료비용 증가, 그리고 불규칙적인 부하 등 최적리스케줄링에 있어 많은 문제들을 해결하기 위한 새로운 변화가 요구된다. 본 논문에서는 Multi-Terminal Voltage Source Converter High Voltage Direct Current (VSC-MTDC)와 Bettary Energy Storage System (BESS)가 결합된 Hybrid Integrated system (HIS)를 통해 발전기 리스케줄링을 위한 최적화 기법을 제안한다. 최적 발전기 리스케줄링을 위한 HIS 퍼포먼스를 위해 VSC station limit과 충 방전을 기반으로 하는 최적화 과정을 수행한다. 최적조류계산 문제는 VSC-MTDC 시스템과 BESS룰 고려하여 정식화되며, 충 방전 전략은 24시간 수요 정보를 사용하여 발전기 리스케줄링을 위한 하이브리드 통합 시스템의 최적알고리즘을 보여준다. 제안된 최적 리스케줄링 기법을 수정된 IEEE 14 모선에 적용하여 효율성을 입증하고자 한다.

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Review on Magnetic Components: Design & Consideration in VHF Circuit Applications

  • Yahaya, Nor Zaihar;Raethar, Mumtaj Begam Kassim;Awan, Mohammad
    • Journal of Power Electronics
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    • v.9 no.2
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    • pp.180-187
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    • 2009
  • When converters operate in megahertz range, the passive components and magnetic devices generate high losses. However, the eddy current issues and choices of magnetic cores significantly affect on the design stage. Apart from that, the components' reduction, miniaturization technique and frequency scaling are required as well as improvement in thermal capability, integration technique, circuit topologies and PCB layout optimization. In transformer design, the winding and core losses give great attention to the design stage. From simulation work, it is found that E-25066 material manufactured by AVX could be the most suitable core for high frequency transformer design. By employing planar geometry topology, the material can generate significant power loss savings of more than 67% compared to other materials studied in this work. Furthermore, young researchers can use this information to develop new approaches based on concepts, issues and methodology in the design of magnetic components for high frequency applications.

Single Phase Switched Reluctance Motor Optimum Design Using Response Surface Methodology and Finite Element Method (반응표면법과 유한요소법을 이용한 단상 스위치드 릴럭턴스 전동기의 최적 설계)

  • Lim, Seung-Bin;Choi, Jae-Hak;Park, Jae-Bum;Son, Yeoung-Gyu;Lee, Ju
    • The Transactions of the Korean Institute of Electrical Engineers B
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    • v.55 no.12
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    • pp.596-607
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    • 2006
  • This paper presents Single Phase Switched Reluctance Motor (SPSRM) optimum design for vacuum cleaners using Response Surface Methodology (RSM) to determine geometric parameters, and the 2-D Finite Element Method (FEM) has been coupled with the circuit equations of the driving converter. Additionally, an optimum process for SPSRM has been proposed and peformed with geometric and electric parameters thereby influencing the inductance variation and effective torque generation as design variables. SPSRM performances have also been analyzed to determine an optimal design model for maximized efficiency at high power factor. In order to confirm the propriety of the Finite Element Method and motor performance calculation, simulation waveform and experiment waveform for motor voltage and current were compared.

Development of RSFQ Logic Circuits and Delay Time Considerations in Circuit Design (RSFQ 논리회로의 개발과 회로설계에 대한 지연시간 고려)

  • Kang, J.H.;Kim, J.Y.
    • Progress in Superconductivity
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    • v.9 no.2
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    • pp.157-161
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    • 2008
  • Due to high speed operations and ultra low power consumptions RSFQ logic circuit is a very good candidate for future electronic device. The focus of the RSFQ circuit development has been on the advancement of analog-to-digital converters and microprocessors. Recent works on RSFQ ALU development showed the successful operation of an 1-bit block of ALU at 40 GHz. Recently, the study of an RSFQ analog-to-digital converter has been extended to the development of a single chip RF digital receiver. Compared to the voltage logic circuits, RSFQ circuits operate based on the pulse logic. This naturally leads the circuit structure of RSFQ circuit to be pipelined. Delay time on each pipelined stage determines the ultimate operating speed of the circuit. In simulations, a two junction Josephson transmission line's delay time was about 10 ps, a splitter's 14.5 ps, a switch's 13 ps, a half adder's 67 ps. Optimization of the 4-bit ALU circuit has been made with delay time consideration to operate comfortably at 10 GHz or above.

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Input quantization effects analysis of DS-CDMA receivers (DS-CDMA 수신기의 입력 양자화 효과 해석)

  • 남승현;성원용
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.23 no.9A
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    • pp.2271-2281
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    • 1998
  • The wordlength optimization for the analog-to-digital converter in DS-CDMA receivers is very important for the efficient implementation of front-end digital demodulator blocks. Wideband CDMA systems reqire a very fast acquisition time, thus they prefer the matched filter base dreceiver architecture.However, the matched filter should san very long chips, and as a results, requires a large number of gates and a high-power consumption. In this paper, the quantization effects on the acquisition performance of the matched filter is analyzed stochastically. The quantization is modeled as a series of saturation and digitization procedures, because the distortion due to the saturation is signal dependent and causes very different effects when compared with that of the, random, digitization noise. Numerical results are obtained to show the optimum saturaton limit of the quantizer for a given wordlength. This analysis can give a guide to low-cost and low-powr digital implementations and assurance of the system performance without intensive simulations.

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Active RC Filter (능동 RC 여파기)

  • 이흥구;이문기
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.7 no.1
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    • pp.9-17
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    • 1970
  • The paper presents pole optimization in RC network of active RC filter using current inversion negative impedance converter. And also empais is placed on improving the stability of the active RC filter. Experimental results obtained with active RC low pass filter, having Chebyshev 2nd order response and modular angle 55$^{\circ}$, cutoff frequency 3.4KC, are shown and compared with theoretical curves.

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