• Transactions of the Korean Society of Mechanical Engineers A
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• v.31 no.12
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• pp.1200-1207
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• 2007

An experimental test is presented for photoelastic stress analysis around a crack tip in tensile loaded plate. The hybrid method coupling photoelastsic fringe inputs calculated by finite element method and complex variable formulations involving conformal mappings and analytical continuity is used to calculate full-field stress around the crack tip in uniaxially loaded, finite width tensile plate. In order to accurately compare calculated fringes with experimental ones, both actual and regenerated photoelastic fringe patterns are two times multiplied and sharpened by digital image processing. Regenerated fringes by hybrid method are quite comparable to actual fringes. The experimental results indicate that Mode I stress intensity factor analyzed by the hybrid method are accurate within three percent compared with ones obtained by empirical equation and finite element analysis.

• Proceedings of the KIEE Conference
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• 1991.07a
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• pp.155-157
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• 1991

This paper describe a Laser CVD technology which realizes planarized interlevel dielectrics in sub-micron VLSI's. This technology comprises sub-micron gap filling with $SiO_2$ films between metal lines. Laser CVD process conditions have been investigated to improve step coverage of interlevel dielectrics. An ArF(193nm) Excimer Laser was used to excite and dissociate gas phase $SiH_4\;and\;N_2O$ molecules. The Laser CVD by $N_2O\;and \;SiH_4$. mixture gases has realized conformal deposition above the temperature of $300^{\circ}C$, as a result sub-micron gaps were buried with $SiO_2$ films.

• Journal of the Korean Society of Visualization
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• v.5 no.1
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• pp.3-8
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• 2007

We present simple methods for fabricating high aspect-ratio polymer nanostructures on a solid substrate by rigiflex lithography with tailored capillarity and adhesive force. In the first method, a thin, thermoplastic polymer film was prepared by spin coating on a substrate and the temperature was raised above the polymer's glass transition temperature ($T_g$) while in conformal contact with a poly(urethane acrylate) (PUA) mold having nano-cavities. Consequently, capillarity forces the polymer film to rise into the void space of the mold, resulting in nanostructures with an aspect ratio of ${\sim}4$. In the second method, very high aspect-ratio (>20) nanohairs were fabricated by elongating the pre-formed nanostructures upon removal of the mold with the aid of tailored capillarity and adhesive force at the mold/polymer interface. Finally, these two methods were further used to fabricate micro/nano hierarchical structures by sequential application of the molding process for mimicking nature's functional surfaces such as a lotus leaf and gecko foot hairs.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.38 no.7
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• pp.779-784
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• 2014

This study provided the analytical model describing the friction-induced noise in the ball joint system under the edge loading condition. The frictional and conformal contact kinematics between the spherical bearing and the hemispherical socket was derived and the dynamic equations of the perturbed motion were established. The numerical results revealed that the bending modes of the ball joint system can become unstable due to friction, and the axial load and contact stiffness strongly influenced the dynamic instability. In contrast, the tilting angle of the socket was not found to significantly contribute to the dynamic instability of the ball joint.

• Journal of the Korean Society for Precision Engineering
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• v.20 no.5
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• pp.218-224
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• 2003

This paper describes a novel MEMS integration technique on a CMOS chip. MEMS integration on CMOS circuit has many advantages in view of manufacturing cost and reliability. The surface topography of a CMOS chip from a commercial foundry has 0.9 ${\mu}{\textrm}{m}$ bumps due to the conformal coating on aluminum interconnect patterns, which are used for addressing each MEMS element individually. Therefore, it is necessary to achieve a flat mirror-like CMOS chip fer the microelectromechanical system (MEMS) such as micro mirror array. Such CMOS chip needs an additional thickness of the dielectric passivation layer to ease the subsequent planarization process. To overcome a temperature limit from the aluminum thermal degradation, this study uses RF sputtering of silicon nitride at low temperature and then polishes the CMOS chip together with the surrounding dummy pieces to define a polishing plane. Planarization reduces 0.9 ${\mu}{\textrm}{m}$ of the bumps to less than 25 nm.

• Journal of the Korean Society for Aviation and Aeronautics
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• v.26 no.2
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• pp.76-82
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• 2018

A test simulator is needed to develop a fuel quantity measurement system that takes into account the roll and pitch motion of the aircraft. In this paper, we develop a test simulator that consists of attitude simulation equipment, fueling equipment, and data storage equipment. The attitude simulation equipment simulates the aircraft attitude. It is manufactured to operate pitch angle and roll angle movement. The fueling equipment supplies fuel to the supplementary fuel tank. The data storage equipment collects and stores the measured data. We also develop an automation software that operates the test simulator and collects data automatically. The test simulator has been automated to prevent testers from being exposed to toxic fuel. Through automation software, the collection period is reduced by one quarter compared to manual collection. The developed fuel quantity measurement system is verified through the test simulator.

• Electrical & Electronic Materials
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• v.28 no.2
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• pp.25-33
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• 2015

Ruthenium (Ru) thin films were grown on thermally-grown $SiO_2$ substrates by atomic layer deposition (ALD) using a sequential supply of four kinds of novel zero-valent Ru precursors, isopropyl-methylbenzene-cyclohexadiene Ru(0) (IMBCHDRu, $C_{16}H_{22}Ru$), ethylbenzen-cyclohexadiene Ru(0) (EBCHDRu, $C_{14}H_{18}Ru$), ethylbenzen-ethyl-cyclohexadiene Ru(0) (EBECHDRu, $C_{16}H_{22}Ru$), and (ethylbenzene)(1,3-butadiene)Ru(0) (EBBDRu, $C_{12}H_{16}Ru$) and molecular oxygen (O2) as a reactant at substrate temperatures ranging from 140 to $350^{\circ}C$. It was shown that little incubation cycles were observed for ALD-Ru processes using these new novel zero-valent Ru precursors, indicating of the improved nucleation as compared to the use of typical higher-valent Ru precursors such as cyclopentadienyl-based Ru (II) or ${\beta}$-diketonate Ru (III) metallorganic precursors. It was also shown that Ru nuclei were formed after very short cycles (only 3 ALD cycles) and the maximum nuclei densities were almost 2 order of magnitude higher than that obtained using higher-valent Ru precursors. The step coverage of ALD-Ru was excellent, around 100% at on a hole-type contact with an ultra-high aspect ratio (~32) and ultra-small trench with an aspect ratio of ~ 4.5 (top-opening diameter: ~ 25 nm). The developed ALD-Ru film was successfully used as a seed layer for Cu electroplating.

• Transactions on Electrical and Electronic Materials
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• v.1 no.1
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• pp.40-44
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• 2000

Metal-ferroelectric-insulator-semoiconductor field effect transistor (MFISFETs) were fabricated using CMOS processes. The Pt/SBT/NO combined layers were etched for forming a conformal gate by using Ti/Cr metal masks and a two step etching method, By the method, we were able to fabricate a small-sized gate with the dimension of $16/4{\mu}textrm{m}$ in the width/length of gate. It has been chosen the non-self aligned source and drain implantation process, We have deposited inter-layer dielectrics(ILD) by low pressure chemical vapor deposition(LPCVD) at $380^{circ}C$ after etching the gate structure and the threshold voltage of p-channel MFISFETs were about 1.0 and -2.1V, respectively. It was also observed that the current difference between the $I_{ON}$(on current) and $I_{OFF}$(off current) that is very important in sensing margin, is more that 100 times in $I_{D}-V_{G}$ hysteresis curve.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.07b
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• pp.719-722
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• 2003

Ferroelectric $Pb(Zr_{1-x}Ti_x)O_3$ (PZT) films were deposited on (001) MgO single crystals using sol-gel method. Structural properties and surface morphologies of PZT films were investigated using an X-ray diffractometer and a scanning electron microscopy, respectively. The dielectric properties of PZT films were investigated with the dc bias field using interdigitated capacitors (IDC) which were fabricated on PZT films using a thick metal layer by photolithography and dry etching process. The small signal dielectric properties of PZT films were calculated by a modified conformal mapping method with low and high frequency data, such as capacitance measured by an impedance gain/phase analyzer at 100 kHz and reflection coefficient (S-parameter) measured by a HP 8510C vector network analyzer at 1 -20 GHz. The IDC on PZT films exhibited about 67% of capacitance change with an electric field of 135 kV/cm at 10 GHz. These PZT thin films can be applied to tunable microwave devices such as phase shifters, tunable resonators and tunable filters.

• Journal of the Korean Ceramic Society
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• v.47 no.1
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• pp.61-65
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• 2010

Ultrathin atomic layer deposition (ALD) coatings were found to enhance the performance of lithium-ion batteries (LIBs). Previous studies have demonstrated that $LiCoO_2$ cathode powders coated with metal oxides with thicknesses of $\sim100-1000{\AA}$ grown using wet chemical techniques improved LIB performance. In this study, $LiCoO_2$ powders were coated with conformal $Al_2O_3$ ALD films with thicknesses of only $\sim3-4{\AA}$ established using 2 ALD cycles. The coated $LiCoO_2$ powders exhibited a capacity retention of 89% after 120 charge-discharge cycles in the 3.3~4.5 V (vs. $Li/Li^+$) range. In contrast, the bare $LiCoO_2$ powders displayed only a 45% capacity retention. This dramatic improvement may result from the ultrathin $Al_2O_3$ ALD film acting to minimize Co dissolution or to reduce surface electrolyte reactions.