• Title/Summary/Keyword: concurrent fault detection

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An Adaptive Checkpointing Scheme for Fault Tolerance of Real-Time Control Systems with Concurrent Fault Detection (동시 결함 검출 기능이 있는 실시간 제어 시스템의 결함 허용성을 위한 적응형 체크포인팅 기법)

  • Ryu, Sang-Moon
    • Journal of Institute of Control, Robotics and Systems
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    • v.17 no.1
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    • pp.72-77
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    • 2011
  • The checkpointing scheme is a well-known technique to cope with transient faults in digital systems. This paper proposes an adaptive checkpointing scheme for the reliability improvement of real-time control systems with concurrent fault detection capability. With concurrent fault detection capability the effect of transient faults are assumed to be detected with no latency. The proposed adaptive checkpointing scheme is based on the reliability analysis of an equidistant checkpointing scheme. Numerical data show the proposed adaptive scheme outperforms the equidistant scheme from a reliability point of view.

Design and Implementation of a Architecture For Fault-Tolerant and Real-Time System (결함허용 실시간 시스템 구조에 대한 설계 및 구현)

  • 유종상;김범식;신인철
    • Proceedings of the Korea Society for Industrial Systems Conference
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    • 1997.11a
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    • pp.417-433
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    • 1997
  • A real-time operating system has focused primary on techniques to minimize processing time, with a secondary emphasis on system reliability issues. Conversely, fault-tolerant system has concentrated on using recourse and information redundancy to maximize the availability and reliability of the system, with a lesser emphasis on performance. We have developed a fault-tolerant and real-time operations system which support a powerful concurrent runtime environment under the above requirements. In this paper, we present an overview of real-time systems, design and implementation of a duplex architecture using advanced concepts and technologies such as fast " fault detection", "fault isolation" and "fault recovery" Because the duplex architecture has two dentical hardware elements and has several recovery steps and hierarchy to facilitate a fast recovery which must be proceeded by a prompt fault detection and isolation. Thus it makes possible to minimize the overhead of the systems including hardware and software and guarantee the service continuity of he systems.

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Fault Detection and Diagnosis of CAN-Based Distributed Systems for Longitudinal Control of All-Terrain Vehicle(ATV) (무인 ATV의 종 방향 제어를 위한 CAN 기반 분산형 시스템의 고장감지 및 진단)

  • Kim, Soon-Tae;Song, Bong-Sob;Hong, Suk-Kyo
    • Journal of Institute of Control, Robotics and Systems
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    • v.14 no.10
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    • pp.983-990
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    • 2008
  • This paper presents the fault detection and diagnosis(FDD) algorithm to enhance reliability of a longitudinal controller for an autonomous All-Terrain Vehicle(ATV). The FDD is designed to monitor and identify faults which may occur in distributed hardware used for longitudinal control, e.g., DSPs, CAN, sensors, and actuators. The proposed FDD is an integrated approach of decentralized and centralized FDD. While the former is processed in a DSP and suitable to detect faults in a single hardware, it is sensitive to noise and disturbance. On the other hand, the latter is performed via communication and it detects and diagnoses faults through analyzing concurrent performances of multiple hardware modules, but it is limited to isolate faults specifically in terms of components in the single hardware. To compensate for disadvantages of each FDD approach, two layered structure including both decentralized and centralized FDD is proposed and it allows us to make more robust fault detection and more specific fault isolation. The effectiveness of the proposed method will be validated experimentally.

A Cost-effective Control Flow Checking using Loop Detection and Prediction (루프 검출 및 예측 방법을 적용한 비용 효율적인 실시간 분기 흐름 검사 기법)

  • Kim Gunbae;Ahn Jin-Ho;Kang Sungho
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.42 no.12
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    • pp.91-102
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    • 2005
  • Recently, concurrent error detection for the processor becomes important. But it imposes too much overhead to adopt concurrent error detection capability on the system. In this paper, a new approach to resolve the problems of concurrent error detection is proposed. A loop detection scheme is introduced to reduce the repetitive loop iteration and memory access. To reduce the memory overheat an offset to calculate the target address of branching node is proposed. Performance evaluation shows that the new architecture has lower memory overhead and frequency of memory access than previous works. In addition, the new architecture provides the same error coverage and requires nearly constant memory size regardless of the size of the application program. Consequently, the proposed architecture can be used as an cost effective method to detect control flow errors in the commercial on the shelf products.