• The Journal of the Convergence on Culture Technology
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• v.9 no.5
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• pp.229-235
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• 2023

This study investigates the relationship between syntactic complexity indices and scores on language use in Jacobs et al.(1981)' analytic rating scale. Syntactic complexity indices obtained from TAASSC program and 440 essays written by EFL students from the ICNALE corpus were analyzed. Specifically, this study explores the relationship between scores on language use and Lu(2011)'s traditional syntactic complexity indices, phrasal complexity indices, and clausal complexity indices, respectively. Results of the stepwise regression analysis showed that phrasal complexity indices turned out to be the best predictor of scores on language use, although the variance in scores on language use was relatively small, compared with the previous study. Implications of the findings of the current study for writing instruction (i.e., syntactic structures at the phrase level) were also discussed.

• Journal of Power Electronics
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• v.18 no.2
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• pp.522-532
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• 2018

The cascaded H Bridge (CHB) multilevel inverter (MLI) is popular among the classical MLI topologies due to its modularity and reliability. Although space vector modulation (SVM) is the most suitable modulation scheme for MLIs, it has not been used widely in industry due to the higher complexity involved in its implementation. In this paper, a simple and novel generalized SVM algorithm is proposed, which has both reduced time and space complexity. The proposed SVM involves the generalization of both the duty cycle calculation and switching sequence generation for any n-level inverter. In order to generate the gate pulses for an inverter, a generalized switch matrix (SM) for the CHB inverter is also introduced, which further simplifies the algorithm. The algorithm is tested and verified for three-phase, three-level and five-level CHB inverters in simulations and hardware implementation. A comparison of the proposed method with existing SVM schemes shows the superiority of the proposed scheme.

• 제어로봇시스템학회:학술대회논문집
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• 2004.08a
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• pp.772-776
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• 2004

This paper proposes an interference avoidance approach for Constraint-Based Routing (CBR) algorithm in the Multi-Protocol Label Switching (MPLS) network. The MPLS network itself has a capability of integrating among any layer-3 protocols and any layer-2 protocols of the OSI model. It is based on the label switching technology, which is fast and flexible switching technique using pre-defined Label Switching Paths (LSPs). The MPLS network is a solution for the Traffic Engineering(TE), Quality of Service (QoS), Virtual Private Network (VPN), and Constraint-Based Routing (CBR) issues. According to the MPLS CBR, routing performance requirements are capability for on-line routing, high network throughput, high network utilization, high network scalability, fast rerouting performance, low percentage of call-setup request blocking, and low calculation complexity. There are many previously proposed algorithms such as minimum hop (MH) algorithm, widest shortest path (WSP) algorithm, and minimum interference routing algorithm (MIRA). The MIRA algorithm is currently seemed to be the best solution for the MPLS routing problem in case of selecting a path with minimum interference level. It achieves lower call-setup request blocking, lower interference level, higher network utilization and higher network throughput. However, it suffers from routing calculation complexity which makes it difficult to real task implementation. In this paper, there are three objectives for routing algorithm design, which are minimizing interference levels with other source-destination node pairs, minimizing resource usage by selecting a minimum hop path first, and reducing calculation complexity. The proposed CBR algorithm is based on power factor calculation of total amount of possible path per link and the residual bandwidth in the network. A path with high power factor should be considered as minimum interference path and should be selected for path setup. With the proposed algorithm, all of the three objectives are attained and the approach of selection of a high power factor path could minimize interference level among all source-destination node pairs. The approach of selection of a shortest path from many equal power factor paths approach could minimize the usage of network resource. Then the network has higher resource reservation for future call-setup request. Moreover, the calculation of possible path per link (or interference level indicator) is run only whenever the network topology has been changed. Hence, this approach could reduce routing calculation complexity. The simulation results show that the proposed algorithm has good performance over high network utilization, low call-setup blocking percentage and low routing computation complexity.

• Proceedings of the IEEK Conference
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• 1998.06a
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• pp.819-822
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• 1998

The high complexity of digital circuits has changed the digital circuits design mehtods from schemeatic-based to hardware description languages like VHDL, verilog that make hardware faults become more hard to detect. Thus test generation to detect hardware defects is very important part of the design. But most of the test generation methods are gate-level based. In this paper new high-level test generation method to detect stuck-at-faults on gate level is described. This test generation method is independent of synthesis results and reduce the time and efforts for test generation.

• Proceedings of the IEEK Conference
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• 2002.06b
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• pp.105-108
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• 2002

Although asynchronous designs have become a promising way to develop complex modern digital systems, there is a few complete design framework for VLSI designers who wish to use automatic CAD tools. Especially, high-level synthesis is not widely concerned until now. In this paper we Proposed a method for high-level synthesis of asynchronous systems as a part of an asynchronous design framework. Our method performs scheduling, allocation, and binding, which are three subtasks of high-level synthesis, in simultaneous using a transformational approach. To deal with complexity of high-level synthesis we use neighborhood search algorithm such as Tabu search.

• The Journal of the Acoustical Society of Korea
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• v.19 no.1
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• pp.78-83
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• 2000

Vocoders used in digital mobile phone adopt new improved algorithm to achieve better communication quality. Therefore the communication problem occurs between mobile phones using different vocoder algorithms. In this paper, the efficient implementation of 8kbps and 13kbps QCELP into one DSP chip to solve this problem is presented. We also describe the optimization method at each level, that is, algorithm-level, equation-level, and coding-level, to reduce the complexity for the QCELP vocoder algorithm implementation. The complexity in the codebook search-loop that is the main part for the QCELP algorithm complexity can be reduced about 50% by using these optimizations. The QCELP implementation with our DSP requires only 25 MIPS of computation for the 8kbps and 33 MIPS for the 13kbps ones. The DSP for our real-time implementation is a 16-bit fixed-point one specifically designed for vocoder applications and has a simple architecture compared to general-purpose ones in order to reduce the power consumption.

• Proceedings of the Korean Institute of Intelligent Systems Conference
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• 2007.11a
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• pp.53-56
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• 2007

Symmerge is a stable minimum storage algorithm for merging that needs $O(mlog\frac{n}{m})$ element comparisons, where m and n are the sizes of the input sequences with m ${\leqq}$ n. According to the lower bound for merging, the algorithm is asymptotically optimal regarding the number of comparisons. The objective of this paper is to consider the relationship between m and n for the spanning case with the recursion level m-1.

• Proceedings of the IEEK Conference
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• 2008.06a
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• pp.447-448
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• 2008

This paper presents a low-complexity design and implementation results of a multi-input multi-output (MIMO) orthogonal frequency division multiplexing (OFDM) symbol detector for high speed wireless LAN (WLAN) systems. The proposed spatial division multiplexing (SDM) symbol detector is designed by HDL and synthesized to gate-level circuits using 0.18um CMOS library. The total gate count for the symbol detector is 238K.

• Journal of information and communication convergence engineering
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• v.5 no.1
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• pp.54-58
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• 2007

A real-time frame-layer rate control algorithm with a token bucket traffic shaper is proposed for distortion variation minimization. The proposed rate control method uses a non-iterative optimization method for low computational complexity, and performs bit allocation at the frame level to minimize the average distortion over an entire sequence as well as variations in distortion between frames. The proposed algorithm does not produce time delay from encoding, and is suitable for real-time low-complexity video encoder. Experimental results indicate that the proposed control method provides better visual and PSNR performances than the existing rate control method.

• Clinical and Experimental Pediatrics
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• v.50 no.1
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• pp.1-6
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• 2007

In the United States, The concept of designation for hospital facilities that care for newborn infants according to the level of complexity of care provided was first proposed in 1976. The extent of perinatal health care regionalization varies widely from one area to the other. facilities that provide hospital care for newborn are classified into three categories on the basis of functional capabilities; level I-primary or basic care, level II-secondary or specialty care, level III-tertially or subspecialty care. These facilities should be organized within a regionalized system of perinatal care. The transport system of newborn infants should be organized for referral of high risk newborn to centers with the personnel and resources needed for their degree of risk and severity of illness. In Korea, The korean society of neonatology was established and articulated in the 1994. During the past decade, the number of neonatologist has increased and neonatal intensive care units have proliferated in Korea. However, no standard definitions exist for the graded levels of complexity of care that neonatal intensive care units provide and no uniform guideline or recommendation for regionalization and referral system of high risk neonate have been established. With the rapid changing neonatal care system in Korea, the optimal neonatal care demands regionalization of care in utilization of manpower resources and in efficient use of advanced technology and facility.