• Journal of the Korea Institute of Military Science and Technology
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• v.24 no.2
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• pp.204-210
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• 2021

In this paper, we studied a method of wirelessly checking up the POD for captive flight tests which is performed during the development of guided weapons systems. The wireless power transfer module, the power distribution device, and the battery pack were designed to wirelessly power the captive flight test POD, and the communication device was designed to enable wireless communication between the POD and the check-up device. The communication device was designed to enable WiFi, IR communication, and laser diode communication, so that various communication methods could be tested. Through the performance test, it was confirmed that power was stably supplied to the captive flight test POD, and the wireless communication performance was verified by measuring the delay time and error rate. As a result, by using our system the POD check-up for the captive flight test was performed wirelessly and the data of the captive equipment could be obtained effectively.

• Smart Structures and Systems
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• v.14 no.6
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• pp.1221-1245
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• 2014

Real-time hybrid simulation (RTHS) is a promising cyber-physical technique used in the experimental evaluation of civil infrastructure systems subject to dynamic loading. In RTHS, the response of a structural system is simulated by partitioning it into physical and numerical substructures, and coupling at the interface is achieved by enforcing equilibrium and compatibility in real-time. The choice of partitioning parameters will influence the overall success of the experiment. In addition, due to the dynamics of the transfer system, communication and computation delays, the feedback force signals are dependent on the system state subject to delay. Thus, the transfer system dynamics must be accommodated by appropriate actuator controllers. In light of this, guidelines should be established to facilitate successful RTHS and clearly specify: (i) the minimum requirements of the transfer system control, (ii) the minimum required sampling frequency, and (iii) the most effective ways to stabilize an unstable simulation due to the limitations of the available transfer system. The objective of this paper is to establish a stability switch criterion due to systematic experimental errors. The RTHS stability switch criterion will provide a basis for the partitioning and design of successful RTHS.

• The KIPS Transactions:PartC
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• v.10C no.5
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• pp.603-610
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• 2003

On the optical network, it is important to build restoration scheme capable to network survivability in preparation of potential failure on communication route. This paper analyze the existing schemes on restoration of failure on the optical network, and propose deferred commit scheme to improve resource utilization and management efficiency. Also, the transfer flow of messages needed for transferring restoration signal are presented in a concrete way and delay time required by shared mesh restoration scheme is explained in a substantial way. Simulation-based comparative analysis of various schemes is performed.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.10C
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• pp.980-986
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• 2002

In the fast data communication system, synchronized by a clock source, the loss of data will often occur due to several reasons as a differential routing path between data and clock, a differential propagation delay of components or an unstable phase of clock and data by external noise. In this paper, we describe the ASIC implementation of the data compensation circuit which can detect the data loss from above problems and recovery to original data with stable synchronization. Especially it supports a strong stability and a good BER in the communication system for fast data transfer as optic area. This circuit is implemented by Verilog HDL and available to the digital ASIC implementations related to fast data transfer.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.14 no.1
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• pp.259-264
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• 2014

IEEE 802.15.4 has been emerging as the popular choice for various monitoring and control applications. In this paper, a fault management system for DC power-lines has been designed using IEEE 802.15.4, in order to monitor DC power-lines in real time, and to rapidly detect faults and shut off the line where such faults occur. Numbers were allocated for each node and unslotted CSMA-CA method of IEEE 802.15.4 was used, the performance of which was analyzed by a simulation. For such purpose, a total of 60 bits of the control data consisting of 16 bits of the current, 16 bits of the amplitude, 28 bits of the terminal state data were sent out, and the packet transfer rate and the transmission delay time of the fault management system for DC power-lines were measured and analyzed. When the traffic load was 330 packets per second or lower, the average delay time was shown to be shorter than 0.02 seconds, and when the traffic load was 260 packets per second or lower, the packet transfer rate was shown to be 99.99% or higher. Therefore, it was confirmed that the stringent condition of US Department of Energy (DOE) could be satisfied if the traffic load was 260 packets per second or lower, The results of this study can be utilized as basic data for the establishment of the fault management system for DC power-lines using IEEE 802.15.4.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.26 no.10
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• pp.1537-1544
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• 2022

When designing chip, it considers design specification, timing problem, and clock synchronization on place & route (P&R) process. P&R process is complicated because of considering various factors. Chip uses clock tree synthesis (CTS) to reduce clock path delay. The purpose of this study is to examine shallow-CTS algorithm for checking clock tree synthesizable. Using open source Parser-Verilog, register transfer level (RTL) synthesizable Verilog file is parsed and it uses Pre-CTS and Post-CTS process that is included shallow-CTS. Based on longest clock path in the Pre-CTS and Post-CTS stages, the standard deviation before and after buffer insertion is compared and analyzed for the accuracy of CTS. In this paper, It is expected that the cost and time problem could be reduced by providing a pre-clock tree synthesis verification method at the RTL level without confirming the CTS result using the time-consuming licensed EDA tool.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2007.10a
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• pp.693-697
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• 2007

The SSB modem performs the modulation process which converts the digital voltage level to the audible frequency band signal and the demodulation process which converts reversely the audible frequency signal to the digital voltage level. The modulator and the demodulator are implemented with a single DSP chip. Because of the SSB specific character, the distortion occurs when the frequency is changed. This distortion has no effect on voice communication, but it has an significant effect on data communication. In other words, it is impossible to send data stream with adjacent 2 periods. Therefore, in case of using 2-tone FSK, it is needed to send at least 3 periods to transmit 1 bit. Therefore we implemented the modem using modified phase-delay shift keying to transmit 1 tone signal for high speed transmission. In the 1200[bps] mode, it generates 0, $187{\mu}s$ delay time at 1.3kHz symbol frequency, and in the 2400[bps] mode, 0, $70{\mu}s$, $130{\mu}s$, $200{\mu}s$ delay time at 1.5kHz symbol frequency. Finally, in the maximum 3600[bps] mode, it generates 0, $100{\mu}s$, $160{\mu}s$, $250{\mu}s$ delay time at 2.0kHz symbol frequency. The measured results of the implemented SSB modem shows a good transfer functional characteristic by spectrum analyzer, almost same bandwidth in pass band and 20dB higher SNR comparing the German PACTOR and American CLOVER and in the experimental transmitting test, we verified the transmitted data is received correctly in platform.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.11
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• pp.15-22
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• 2016

In satellite communication, transmission performance is degraded due to long propagation delay and relatively high data loss compared to terrestrial network. In this paper, We propose Hybrid TCP PEP scheme with XOR coding and Hybla TCP, which reduces the transmission performance degradation due to the transmission delay time. Experimental results show that the proposed method improves the file transfer rate by more than 10% in the environment with high channel error rate. Therefore, Hybrid TCP, which is a mixture of XOR coding method and TCP Hybla, is considered to contribute to the improvement of transmission speed in satellite communication when applied to connection split PEP.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.1B
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• pp.1-12
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• 2002

In the multimedia CDMA mobile communication service, it is required to support various applications, such as voice, video, file transfer, e-mail, and Internet access, with guaranteed QoS. In the mixed traffic environment ,which consists of voice, stream data, and packet data, we analyze the network where preemptive priority is granted to delay-intolerant voice service and a buffer is offered to delay-tolerant stream data service. And, for best-effort packet data service, the access control by transmission permission probability is applied to obtain prominent throughput. To analyze the multimedia CDMA mobile communication system, we build a 2-dimensional markov chain model about prioritized-voice and stream data services and accomplish numerical analysis in combination with packet data traffic based on residual capacity equation.

• The Journal of the Korea institute of electronic communication sciences
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• v.1 no.2
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• pp.102-109
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• 2006

In this paper, we improve the performance of bidirectional TCP connection over end-to-end network that uses transfer rate-based flow and congestion control. The sharing of a common buffer by TCP packets and acknowledgement has been known to result in an effect called ack compression, where acks of a connection arrive at the source bunched together, resulting in unfairness and degraded throughput. The degradation in throughput due to bidirectional traffic can be significant. For example, even in the simple case of symmetrical connections with adequate window size, the connection efficiency is improved about 20% for three levels of background traffic 2.5Mbps, 5.0Mbps and 7.5Mbps. Otherwise, the throughput of jitter is reduced about 50% because round trip delay time is smaller between source node and destination node. Also, we show that throughput curve is improved with connection rate algorithm which is proposed for TCP congestion avoidance as a function of aggressiveness threshold for three levels of background traffic 2.5Mbps, 5Mbps and 7.5Mbps.