• 제목/요약/키워드: common mode signal

검색결과 100건 처리시간 0.029초

Common Mode Feedback 회로를 위한 저 증폭도 에러증폭기 (A low-Gain Error Amplifier for Common-Mode Feedback Circuit)

  • 정근정;노정진
    • 대한전자공학회논문지SD
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    • 제40권9호
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    • pp.714-723
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    • 2003
  • 아날로그 IC의 signal swing을 증가시키고 노이즈를 감소시키는 효율적이고 기본적인 방법은 fully-differential 회로를 이용하는 것이다. 하지만 differential-mode 신호처리에 영향을 미치는 common-mode 출력 레벨을 안정되도록 하기 위해서는 common-mode feedback (CMFB)회로가 사용되어야 한다. 본 논문에서는 CMFB 구성과 출력 레벨을 안정되도록 하기 위해 사용되는 에러증폭기 회로들의 설계 방법을 기술하고, 트랜지스터들로만 구성된 효율적인 저 증폭도 에러증폭기론 제안한다. 제안된 에러증폭기는 phase margin 증가 및 differential-mode 입력 신호의 swing 폭을 증가시킨다.

Reduction of Common Mode Voltage in Asymmetrical Dual Inverter Configuration Using Discontinuous Modulating Signal Based PWM Technique

  • Reddy, M. Harsha Vardhan;Reddy, T. Bramhananda;Reddy, B. Ravindranath;Suryakalavathi, M.
    • Journal of Power Electronics
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    • 제15권6호
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    • pp.1524-1532
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    • 2015
  • Conventional space vector pulse width modulation based asymmetrical dual inverter configuration produces high common mode voltage (CMV) variations. This CMV causes the flow of common mode current, which adversely affects the motor bearings and electromagnetic interference of nearby electronic systems. In this study, a simple and generalized carrier based pulse width modulation (PWM) technique is proposed for dual inverter configuration. This simple approach generates various continuous and discontinuous modulating signals based PWM algorithms. With the application of the discontinuous modulating signal based PWM algorithm to the asymmetrical dual inverter configuration, the CMV can be reduced with a slightly improved quality of output voltage. The performance of the continuous and discontinuous modulating signals based PWM algorithms is explored through both theoretical and experimental studies. Results show that the discontinuous modulating signal based PWM algorithm efficiently reduces the CMV and switching losses.

동상분 제거에 의한 입체음향의 채널 분리도 개선 (An Enhancement of Channel Separability for Stereophonic Signals by Common Mode Rejection Method)

  • 권호열
    • 산업기술연구
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    • 제18권
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    • pp.439-442
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    • 1998
  • In this paper, we firstly suggested C&D (Common mode and Differential mode) model for the representation of a stereophonic signal. Then a measure of stereophonic channel separability is defined as the ratio of differential mode energy to total energy in frequency domain. After that, a new channel separability enhancement scheme is proposed by the control of common mode rejection. Finally, some experimental results are presented in order to verify our scheme.

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3레벨 4레그 PWM 컨버터의 커먼 모드 전압 저감 (Common-mode Voltage Reduction of Three Level Four Leg PWM Converter)

  • 지승준;고상기;김현식;설승기
    • 전력전자학회논문지
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    • 제19권6호
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    • pp.488-493
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    • 2014
  • This paper presents a carrier-based pulse-width modulation(PWM) method for reducing the common-mode voltage of a three-level four-leg converter. The idea of the proposed PWM method is intuitive and easy to be implemented in digital signal processor-based converter control systems. On the basis of the analysis of space-vector PWM(SVPWM) and sinusoidal PWM(SPWM) switching patterns, the fourth leg pole voltage of the three-phase converter called "f leg pole voltage" is manipulated to reduce the common-mode voltage. To synthesize f leg pole voltage for the suppression of the common-mode voltage, positive and negative pole voltage references of f leg are calculated. An offset voltage is also deduced to prevent the distortion of a, b, and c phase voltages. The feasibility of the proposed PWM method is verified by simulation and experimental results. The common-mode voltage of the proposed PWM method in peak-to-peak value is 33% in comparison with that of the conventional SVPWM method. The transition number of the common-mode voltage is also reduced to 25%.

TMS320F240을 이용한 PWM 인버터 유도전동기 구동 시스템의 전도노이즈 저감을 위한 스위칭 기법 (A Switching Technique for Common Mode Voltage Reduction of PWM-Inverter Induction Motor Drive System Using TMS320F240)

  • 박규현;김이훈;원충연;김규식;최세완;함년근
    • 전력전자학회논문지
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    • 제8권1호
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    • pp.89-97
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    • 2003
  • PWM 인버터에 의해 구동리근 유도전동기에 발생되는 고주파 커먼 모드 전압은 전도성 EMI, 전통기 접지전류, 베어링 전류 및 다른 원치 않는 결과의 주원인이 된다. 인버터 제어의 무효벡터 스위칭 상태는 나머지 유효벡터 스위칭 상태에 비교하여 큰 커먼 모드 전압을 일으킨다. 그러므로 이 논문은 커먼 모드 전압을 완화하는 스위칭기법을 다룬다. 즉 정현파 PWM 기법을 기본으로 한 커먼 모드 전압 제거방법을 제안하였다. PWM 신호는 각자의 정현과 기준신호와 120$^{\circ}$위상차가 나는 3개의 캐리어 파형과 비교하여 발생된다. 시뮬레이션과 실험적 결과는 제안된 PWM 기법에서 커먼 모드 전압이 종래의 PWM 기법보다 약 66% 더 저감됨을 보였다.

DC Motor Drive with Circuit Balancing Technique to Reduce Common Mode Conducted Noise

  • Jintanamaneerat, Jintanai;Srisawang, Arnon;Prempraneerach, Yothin
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 2003년도 ICCAS
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    • pp.1881-1884
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    • 2003
  • In some requirements of dc motor drive circuit applications are high quality output with generation of low internal conducted EMI. However the conventional dc motor drive circuits have been usually using unbalanced circuit which generates the high conducted EMI to the frame ground. This paper presents a balanced dc motor drive circuit which is effective way to reduce the common-mode noise. The circuit balancing is to make the noise pick up or occurring in both conductor lines, signal path and return path is equal in amplitude and opposite phase so that it will cancel out in the frame ground. The common-mode conducted noise reduction of this proposed dc motor drive is confirmed by experimental results.

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공통-모드 간섭 (CMI)에 강인한 2-전극 기반 심전도 계측 회로 (CMI Tolerant Readout IC for Two-Electrode ECG Recording)

  • 강상균;남경식;고형호
    • 센서학회지
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    • 제32권6호
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    • pp.432-440
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    • 2023
  • This study introduces an efficient readout circuit designed for two-electrode electrocardiogram (ECG) recording, characterized by its low-noise and low-power consumption attributes. Unlike its three-electrode counterpart, the two-electrode ECG is susceptible to common-mode interference (CMI), causing signal distortion. To counter this, the proposed circuit integrates a common-mode charge pump (CMCP) with a window comparator, allowing for a CMI tolerance of up to 20 VPP. The CMCP design prevents the activation of electrostatic discharge (ESD) diodes and becomes operational only when CMI surpasses the predetermined range set by the window comparator. This ensures power efficiency and minimizes intermodulation distortion (IMD) arising from switching noise. To maintain ECG signal accuracy, the circuit employs a chopper-stabilized instrumentation amplifier (IA) for low-noise attributes, and to achieve high input impedance, it incorporates a floating high-pass filter (HPF) and a current-feedback instrumentation amplifier (CFIA). This comprehensive design integrates various components, including a QRS peak detector and serial peripheral interface (SPI), into a single 0.18-㎛ CMOS chip occupying 0.54 mm2. Experimental evaluations showed a 0.59 µVRMS noise level within a 1-100 Hz bandwidth and a power draw of 23.83 µW at 1.8 V.

Common-Mode Current Reduction with Synchronized PWM Strategy in Two-Inverter Air-Conditioning Systems

  • Baek, Youngjin;Park, Gwigeun;Park, Dongmin;Cha, Honnyong;Kim, Heung-Geun
    • Journal of Power Electronics
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    • 제19권6호
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    • pp.1582-1590
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    • 2019
  • A new method for reducing the common-mode current generated by the voltage variations in a two-inverter air conditioner system by applying a synchronized pulse-width modulation (PWM) strategy is proposed. The PWM signals of the master-mode inverter are generated based on the reference voltage, while those of the slave-mode inverter are output in the opposite direction when the master-mode inverter changes its switching state. However, the slave-mode control results in a mismatch between the reference voltage and the actual output voltage that is modified by synchronized control operation. The proposed method is capable of reducing and controlling this voltage error by performing signal selection in the vector space of the slave-mode inverter, which mitigates the distortion of the phase current. The efficacy of this method in reducing conducted emissions has been validated both theoretically and experimentally.

Common-Mode Current Cancellation Scheme of Half-Bridge Switch-Mode Converter for DC Motor Drive

  • Srisawang, Arnon;Panaudomsup, Sumit;Prempraneerach, Yothin
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 2003년도 ICCAS
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    • pp.1876-1879
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    • 2003
  • Due to the conventional half-bridge switch-mode converters for dc motor drive have been usually using unbalanced circuit topologies which generate common-mode currents through parasitic capacitors distributed between the ground and the dc motor frame such as the heat-sink of switching devices or the frame of the dc motor. This paper describes methods that cancel common-mode current generated in half-bridge switch-mode converters by using circuit balancing technique. The circuit balancing is to make the noise pickup or occurring in both conductor lines, signal and return pathes, is equal in amplitude and opposite in phase so that it will be canceled out in the ground plane. The common-mode current cancellation in the proposed converter is confirmed by experimental results.

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용량성 결합 능동 전극의 공통 모드 구동 차폐 (A Study on comnon-mode-driven shield for capacitive coupling active electrode)

  • 임용규
    • 융합신호처리학회논문지
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    • 제13권4호
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    • pp.201-206
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    • 2012
  • 간접접촉 심전도 측정(Indirect-Contact ECG)은 일상생활에서의 무구속 무자각 측정에 적합한 심전도 측정 방법이다. 본 연구는, 간접접촉 심전도 측정에서 크게 관측되는 60Hz 전원선 잡음을 줄이기 위한 새로운 방법으로, 공통모드 구동 차폐 방식을 제안하였다. 공통 모드 구동 차폐 방식은, 간접 접촉 심전도에서 사용되는 용량성 결합 능동 전극(Capacitive coupling active electrode)을 둘러싼 전기적 차폐(electric shield)의 전압을 공통 모드 전압과 동일하게 유지하는 방법이다. 이 방법은 공통모드 전압의 크기는 그대로 유지하지만, 의복 임피던스 차에 의한 공통모드 전압의 차동 모드 전환에 의한 잡음은 효과적으로 줄일 수 있다. 따라서 두 전극 사이의 의복의 임피던스 차이가 커서 공통 모드 전원 잡음이 심각한 간접 접촉 심전도 측정에서, 효과적으로 공통 모드 잡음을 줄일 수 있다. 실제 간접 접촉 심전도 측정에 제안된 방법을 적용한 결과로 이론적 예상보다는 60Hz 잡음 감소비가 적었지만, 60Hz 잡음이 크게 줄어드는 것을 확인할 수 있었다. 특히 의복 임피던스 차가 크게 발생하는 경우, 예상대로 잡음 감소비가 커짐을 볼 수 있었다. 제안된 방법은 접지 특성이 좋지 않은 측정 조건에서 전원 잡음을 줄이는데 유용할 것으로 기대된다.