• Journal of the Korean Institute of Telematics and Electronics
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• v.23 no.1
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• pp.1-9
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• 1986

This is the third part of the four-part paper describing the development of a packet-switched computer communication network named the KORNET. In this paper we describe the design and implementation of the X.25 protocol connecting packet mode data terminal equipments(PDTE's) with data circuit terminating equipments(DCE's). In the KORNET, the X.25 protocol has been implemented on the line processing module-A(LPMA) of the network node processor(NNP). In the implementation of X.25, we have divided the software module according to the service function, and have determined the the rules that interact between the modules. Each layer protocol has been developed using the technique of the finite state machine. Before the actual coding of softwares, we hafve used formal software development tools based on the specification and description language (SDL) and program design languate (PDL) recommended by the CCITT. In addition, for the efficient operation of the X.25 protocol system we have analyzed the system performance and the service scheduling method of each module. The results will also be given.

• Journal of the Korean Institute of Telematics and Electronics
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• v.23 no.1
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• pp.10-19
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• 1986

This is the last part of the four-part describing the development of a packet-switched computer communication network named the KORNET. In this paper we describe the design and implementation of the packet assembler/dissassembler (PAD) protocol for the asynchronous channel service, and of the network management softwares. The line processing module-B(LPMB) system supporting the asynchronous line includes a PAD protocol, a packet mode DTE/DCE protocol converting to the X.25 protocol, and the asynchronous receiver/transmitter(ART) software. The network management software is operated in master central processing module(MCPM) which includes virtual circuit management (VCM) managing the user channel, the routing management and the high level protocol for communication between the network management center (NMC) and the network node processor(NNP). In this paper, the design, implementation and operation of the softwares for the above service functions will be described in detail.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.24 no.2
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• pp.139-145
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• 2024

This paper presents the design of a voltage controlled oscillator (VCO) which is one of the key building blocks in modern wireless communication systems with small VCO gain (K_vco) variation. To compensate conventional large K_vco variation, a series varactor bank has been added to the conventional LC-tank with parallel capacitor bank array. And also, in order to achieve excellent phase noise performance while maintaining wide tuning range, a mixed coarse/fine tuning scheme(series varactor array and parallel capacitor array) is chosen. The switched varactor array bank is controlled by the same digital code for switched capacitor array without additional digital circuits. For use at a low voltage of 1.2V, the proposed current reference circuit in this paper used a current reference circuit for safety with the common gate removed more safely. Implemented in a TSMC 0.13㎛ CMOS RF technology, the proposed VCO can be tuned from 4.4GH to 5.3GHz with the K_vco (VCO gain ) variation of less than 9.6%. While consuming 3.1mA from a 1.2V supply, the VCO has -120dBc/Hz phase noise at 1MHz offset from the carrier of the 5.3 GHz.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.44 no.2
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• pp.1-5
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• 2007

Wavelength-division multiplexed (WDM) networks are emerging to be the right choice for the future transport networks. In WDM networks, the optical layer provides circuit-switched lightpath services to the client layer such as IP, SONET and ATM. The set of lightpaths in the optical layer defines the virtual topology. Since the optical switches are reconfigurable, the virtual topology can be reconfigured in accordance with the changing traffic demand pattern at theclient layer in order to optimize the network performance. We present a new approach to the virtual topology reconfiguration and loadbalancing problem for wavelength-routed, optical wide-area networks under dynamic traffic demand. By utilizing the measured Internet backbone traffic characteristics, our approach follows the changes in traffic without assuming that the future traffic pattern is known. For the simulation traffic modeling, we collected the data from real backbone traffic. Experiments show that the standard deviation compared to previous technique is reduced.

• Journal of the Microelectronics and Packaging Society
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• v.15 no.3
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• pp.19-25
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• 2008

In this paper, author proposes a novel step-up AC-DC chopper operated with power factor correction(PFC) and with high efficiency. The proposed chopper behaves with discontinuous current control(DCC) of input current. The input current waveform in the proposed chopper is got to be a discontinuous sinusoid form in proportion to magnitude of ac input voltage under the constant duty cycle switching. Therefore, the input power factor is nearly unity and the control method is simple. In the general DCC chopper, the switching devices are turned-on with the zero current switching, but turn-off of the switching devices is switched at current maximum value. To achieve a soft switching of the switching rum-off, the proposed chopper is used a new partial resonant circuit. The result is that the switching loss is very low and the efficiency of chopper is high.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.21 no.1
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• pp.46-52
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• 2010

A compact circular microstrip patch antenna with a switchable circular polarization(CP) is proposed at 2.4 GHz. An unequal cross-shaped slot on a ground plane is utilized as a perturbation. By switching pin diodes mounted on the slot, the CP sense of each antenna can be simply switched from left-handed(LH) CP to right-handed(RH) CP vice versa. Since the perturbation can be made on the ground plane and no bias circuit is required on the patch side, the bias circuit has not effect on the main beam radiation. From the experimental results, the impedance bandwidth and CP bandwidth of the proposed antenna have shown up to 150 MHz and 35 MHz, respectively. The peak gain of the proposed antenna is 1.7 dBi for both CP senses.

• The Transactions of the Korean Institute of Power Electronics
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• v.12 no.6
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• pp.433-440
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• 2007

Recently, the reduction of standby power consumption is significantly issued in electronic and electrical industry for the conservation of environment. In the case of a switched mode power supply (SMPS), it is demanded high efficiency at extremely low output power conditions by consumers. However, it is very different from high efficiency techniques at full load conditions. In addition, many SMPSs are designed as a multi-output circuit for various loads because of cost down. This circuit is difficult to implement both high efficiency and good cross regulation performance, simultaneously. In this paper, secondary side post regulator (SSPR), current mode control method, and power sequence control technique are proposed to reduce standby power consumption and to improve cross regulation performance of the multi-output SMPSs which consist of single or multiple converter. The proposed methods are analyzed by their operational principles and optimal designs verified by experimental results with 110[W] and 270[W] SMPSs.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.5
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• pp.48-55
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• 1999

This paper describes automatic gain control circuit (AGC) design techniques for CMOS CCD camera interface systems. The required gain of the AGC in the proposed system is controlled directly by digital bits without conventional extra D/A converters and the signal settling behavior is almost independent of AGC gain variation at video speeds. A capacitor-segment combination technique to obtain large capacitance values considerably improves the effective bandwidth of the AGC based on switched-capacitor techniques. A proposed layout scheme for capacitor implementation shows AGC matching accuracy better than 0.1 %. The outputs from the AGC are transferred to a 10b A/D converter integrated on the same chip. The proposed AGC is implemented as a sub-block of a CCD camera interface system using a 0.5 um n-well CMOS process. The prototype shows the 32-dB AGC dynamic range in 1/8-dB steps with 173 mW at 3 V and 25 MHz.

• Journal of IKEEE
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• v.18 no.1
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• pp.119-127
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• 2014

This paper presents a CMOS readout circuit for MEMS(Micro Electro Mechanical System) acceleration sensors. It consists of a MEMS accelerometer, a capacitance to voltage converter(CVC) and a second-order switched-capacitor ${\Sigma}{\Delta}$ modulator. Correlated-double-sampling(CDS) and chopper-stabilization(CHS) techniques are used in the CVC and ${\Sigma}{\Delta}$ modulator to reduce the low-frequency noise and DC offset. The sensitivity of the designed CVC is 150mV/g and its non-linearity is 0.15%. The duty cycle of the designed ${\Sigma}{\Delta}$ modulator output increases about 10% when the input voltage amplitude increases by 100mV, and the modulator's non-linearity is 0.45%. The total sensitivity is 150mV/g and the power consumption is 5.6mW. The proposed circuit is designed in a 0.35um CMOS process with a supply voltage of 3.3V and a operating frequency of 2MHz. The size of the designed chip including PADs is $0.96mm{\times}0.85mm$.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.3B
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• pp.161-167
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• 2007

In this paper, we evaluate the capacity of voice over internet protocol (VoIP) services over high-speed downlink packet access (HSDPA), in which frame-bundling (FB) is incorporated to reduce the effect of relatively large headers in the IP/UDP/RTP layers. Also, a modified proportional pair (PF) packet scheduler design supporting for VoIP service is provided. The main focus of this work is the effect of FB on system outage based on delay budget in radio access networks. Simulation results show that VoIP system performance with FB scheme is highly sensitive to delay budget. We also conclude that HSDPA is attractive for transmission of VoIP if compared to the circuit switched (CS) voice that is used in WCDMA (Release'99).