• Title/Summary/Keyword: circuit-level model

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Fabrication of Vibration-Driven Electromagnetic Energy Harvester with Spring-Less and Its Characteristics (스프링이 없는 진동형 전자기식 에너지 하베스터의 제작과 그 특성)

  • Ryu, Kyeong-Il;Chung, Gwiy-Sang
    • Journal of Sensor Science and Technology
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    • v.20 no.4
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    • pp.249-253
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    • 2011
  • This paper describes the fabrication and characteristics of vibration-driven electromagnetic energy harvester without spring to use at low frequency like a human body motion. The implemented energy harvester consists of NdFeB magnets, copper coil. The optimization of induced voltage was done by the various widths of coil, number of the turns, size of fixed and moving magnets and thicknesses of the cylinder. The fabricated energy harvester is capable of producing up to 15.0 $V_{pp}$ for basic model and 28.80 $V_{pp}$ for improved model at 5.0 Hz resonance frequency and 0.75 g acceleration level. The basic model and improved model are provided a maximum power of 6.375 mWand 25.831 mW at 1 KHz of load resistance in rectifier circuit.

Effects of Hydrogen on the PWSCC Initiation Behaviours of Alloy 182 Weld in PWR Environments

  • Kim, H.-S.;Hong, J.-D.;Lee, J.;Gokul, O.S.;Jang, C.
    • Corrosion Science and Technology
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    • v.14 no.3
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    • pp.113-119
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    • 2015
  • Alloy 82/182 weld metals had been extensively used in joining the components of the PWR primary system. Unfortunately, there have been a number of incidents of cracking caused by PWSCC in Alloy 82/182 welds during the operation of PWR worldwide. To mitigate PWSCC, optimization of water-chemistry conditions, especially dissolved hydrogen (DH) and Zn contents, is considered as the most promising and effective remedial method. In this study, the PWSCC behaviours of Alloy 182 weld were investigated in simulated PWR environments with various DH content. Both in-situ and ex-situ oxide characterizations as well as PWSCC initiation tests were performed. The results showed that PWSCC crack initiation time was shortest in PWR water (DH: 30cc/kg). Also, high stress reduced crack initiation time. Oxide layer showed multi-layered structures consisted of the outer needle-like Ni-rich oxide layer, Fe-rich crystalline oxide, and inner Cr-rich inner oxide layers, which was not altered by the level of applied stress. To analyse the multi-layer structure of oxides, EIS measurement were fitted into an equivalent circuit model. Further analyses including TEM and EDS are underway to verify appropriateness of the equivalent circuit model.

Modeling and Analysis of Power Piezoelectric Transformer and Its Application to Fluorescent Lamp Ballasts (압전 변압기의 모델링과 형광등 안정기회로에의 응용)

  • Choe, Seong-Jin;Lee, Gyu-Chan;Jo, Bo-Hyeong
    • The Transactions of the Korean Institute of Electrical Engineers B
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    • v.48 no.7
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    • pp.376-383
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    • 1999
  • The piezoelectric transformer (PT) is an electro-mechanical device that transfers electrical energy through a mechanical vibration. In this paper, a PT operating in the contour vibration mode is introduced for an application of fluorescent lamp ballast. Utilizing its inherent characteristics of the LC resonator and a high voltage gain to ignite the lamp in light load condition, an investigation of a power piezoelectric transformer as a potential component for a fluorescent lamp ballast is discussed. PT is easy to be produced in mass and reduces the cost of the ballast. The modified equivalent circuit model of the PT considering the operating current level is derived to design the fluorescent lamp ballast. This model describes the voltage gain of the PT in wide load variations and various input current levels. The experimental and simulation results are provided to verify theoretical analysis. The power capacity of the currently developed PT is relatively low (15W), but it can be increased by adopting a multi-layer structure and is currently under investigation. It is also possible to parallel the PT for higher power processing.

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Application of CCTV Image and Semantic Segmentation Model for Water Level Estimation of Irrigation Channel (관개용수로 CCTV 이미지를 이용한 CNN 딥러닝 이미지 모델 적용)

  • Kim, Kwi-Hoon;Kim, Ma-Ga;Yoon, Pu-Reun;Bang, Je-Hong;Myoung, Woo-Ho;Choi, Jin-Yong;Choi, Gyu-Hoon
    • Journal of The Korean Society of Agricultural Engineers
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    • v.64 no.3
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    • pp.63-73
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    • 2022
  • A more accurate understanding of the irrigation water supply is necessary for efficient agricultural water management. Although we measure water levels in an irrigation canal using ultrasonic water level gauges, some errors occur due to malfunctions or the surrounding environment. This study aims to apply CNN (Convolutional Neural Network) Deep-learning-based image classification and segmentation models to the irrigation canal's CCTV (Closed-Circuit Television) images. The CCTV images were acquired from the irrigation canal of the agricultural reservoir in Cheorwon-gun, Gangwon-do. We used the ResNet-50 model for the image classification model and the U-Net model for the image segmentation model. Using the Natural Breaks algorithm, we divided water level data into 2, 4, and 8 groups for image classification models. The classification models of 2, 4, and 8 groups showed the accuracy of 1.000, 0.987, and 0.634, respectively. The image segmentation model showed a Dice score of 0.998 and predicted water levels showed R2 of 0.97 and MAE (Mean Absolute Error) of 0.02 m. The image classification models can be applied to the automatic gate-controller at four divisions of water levels. Also, the image segmentation model results can be applied to the alternative measurement for ultrasonic water gauges. We expect that the results of this study can provide a more scientific and efficient approach for agricultural water management.

A Design of Wide-Bandwidth LDO Regulator with High Robustness ESD Protection Circuit

  • Cho, Han-Hee;Koo, Yong-Seo
    • Journal of Power Electronics
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    • v.15 no.6
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    • pp.1673-1681
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    • 2015
  • A low dropout (LDO) regulator with a wide-bandwidth is proposed in this paper. The regulator features a Human Body Model (HBM) 8kV-class high robustness ElectroStatic Discharge (ESD) protection circuit, and two error amplifiers (one with low gain and wide bandwidth, and the other with high gain and narrow bandwidth). The dual error amplifiers are located within the feedback loop of the LDO regulator, and they selectively amplify the signal according to its ripples. The proposed LDO regulator is more efficient in its regulation process because of its selective amplification according to frequency and bandwidth. Furthermore, the proposed regulator has the same gain as a conventional LDO at 62 dB with a 130 kHz-wide bandwidth, which is approximately 3.5 times that of a conventional LDO. The proposed device presents a fast response with improved load and line regulation characteristics. In addition, to prevent an increase in the area of the circuit, a body-driven fabrication technique was used for the error amplifier and the pass transistor. The proposed LDO regulator has an input voltage range of 2.5 V to 4.5 V, and it provides a load current of 100 mA in an output voltage range of 1.2 V to 4.1 V. In addition, to prevent damage in the Integrated Circuit (IC) as a result of static electricity, the reliability of IC was improved by embedding a self-produced 8 kV-class (Chip level) ESD protection circuit of a P-substrate-Triggered Silicon Controlled Rectifier (PTSCR) type with high robustness characteristics.

A Simulation-Based Analog Cell Synthesis with Improved Simulation Efficiency (시뮬레이션 효율을 향상시킨 시뮬레이션 기반의 아날로그 셀 합성)

  • 송병근;곽규달
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.36C no.10
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    • pp.8-16
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    • 1999
  • This paper presents a new simulation-based analog cell synthesis approach with improved simulation efficiency For the hierarchical synthesis of analog cells we developed the sub-circuit optimizers such as current mirror and differential input stage. Each sub-circuit optimizer can be used for synthesis of analog cells such as OTA(operational transconductance amplifier), 2-stage OP-AMP and comparator. To reduce the time spending of the simulation-based synthesis we propose 2-stage searching scheme and simulation data reusing scheme. With those schemes the synthesis time spending of OTA was reduced from 301.05sec to 56.52sec by 81.12%. Since our synthesis system doesn't need other additional physical parameters except SPICE parameters, and is independent of the process and its model level, the time spending to port to other process is minimized. We synthesized OTA and 2-stage OP-AMP respectively with our approach to show its usefulness.

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SAW Filter Transmission Characteristics Design with Genetic Algorithm

  • Park, Kyu­-Chil;Kim, Seok­-Jae
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.7 no.8
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    • pp.1767-1775
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    • 2003
  • The SAW device is extensively used as a electro$.$mechanical band­pass filter in which a two­pairs of interdigital transducers are provided over the surface of the piezoelectric substrate. For the design requirement, the central frequency and the bandwidth of the passband, and the attenuation level of the stopband region are specified. The configuration is made so as to satisfy the specification given. The central frequency is mainly determined by the distance between the pair of the finger electrodes. The design is considered as an optimization problem with which the error norm, the distance between the desired characteristics and the calculated for a given model is to be minimized. The delta function model and the electrical equivalent circuit model are utilized to represent the SAW filter characteristics. Genetic algorithm is used for optimization in which apodization of the transducer fingers is chosen as a design variable.

Design of an FPGA-Based RTL-Level CAN IP Using Functional Simulation for FCC of a Small UAV System

  • Choe, Won Seop;Han, Dong In;Min, Chan Oh;Kim, Sang Man;Kim, Young Sik;Lee, Dae Woo;Lee, Ha-Joon
    • International Journal of Aeronautical and Space Sciences
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    • v.18 no.4
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    • pp.675-687
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    • 2017
  • In the aerospace industry, we have produced various models according to operational conditions and the environment after development of the base model is completed. Therefore, when design change is necessary, there are modification and updating costs of the circuit whenever environment variables change. For these reasons, recently, in various fields, system designs that can flexibly respond to changing environmental conditions using field programmable gate arrays (FPGAs) are attracting attention, and the rapidly changing aerospace industry also uses FPGAs to organize the system environment. In this paper, we design the controller area network (CAN) intellectual property (IP) protocol used instead of the avionics protocol that includes ARINC-429 and MIL-STD-1553, which are not suitable for small unmanned aerial vehicle (UAV) systems at the register transistor logic (RTL) level, which does not depend on the FPGA vender, and we verify the performance. Consequentially, a Spartan 6 FPGA model-based system on chip (SoC) including an embedded system is constructed by using the designed CAN communications IP and Xilinx Microblaze, and the configured SoC only recorded an average 32% logic element usage rate in the Spartan 6 FPGA model.

An Analytical Transient Model for NPT IGBT

  • Ryu, Se-Hwan;Ahn, Hyung-Keun;Han, Deuk-Young
    • Proceedings of the KIPE Conference
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    • 2001.10a
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    • pp.26-30
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    • 2001
  • In this paper, transient characteristics of IGBT has been analytically solved to express the excess minority carrier distribution in active base region and the output voltage. Non-Punch Through(NPT) structure has been selected to prove the validity of the model. It is based on the equivalent circuit of MOSFET which supplies a low gain and a high level injection to the base of BJT. None of the quasi static conditions have been assumed to trace the transient characteristics. The basic elements of the model have been derived from the ambipolar transport theory. Theoretical predictions of the output voltages have been obtained with different lifetimes and compared with experimental and theoretical results available in the literature. From the analytical approach, good agreement has been obtained to provide reliable and fast output of the device.

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Flight Model Development of Linearized Channel Amplifier (선형화 채널 증폭기 비행모델 개발)

  • Hong, Sang-Pya;Go, Yeong-Mok;Yang, Ki-Dug;Ra, Keuk-Hwan
    • The Journal of The Korea Institute of Intelligent Transport Systems
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    • v.8 no.3
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    • pp.83-90
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    • 2009
  • This paper presents the design and measurement of a flight model for a Ku-Band Linearized Channel Amplifier. All MMICs, Variable Gain Amplifier (VGA), Variable Voltage Attenuator ('.IVA), Branch line Coupler and Detector for Pre-distorter are fabricated using a Thin-Film Hybrid process. The performance of the fabricated module is verified through the radio frequency circuit simulation tool and electrical function test in space environment.

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