• 제목/요약/키워드: chip-on-film

검색결과 212건 처리시간 0.059초

COF(Chip On Film)에서의 Polyimide/Buffer layer/Cu 접착력 향상 (Adhesive improvement of the Polyimide/Buffer layer/Cu at the COF(Chip On Film))

  • 이재원;김상호;이지원;홍순성
    • 반도체디스플레이기술학회지
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    • 제3권3호
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    • pp.11-17
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    • 2004
  • This research has been progressed for adhesive improvement of the Polyimide/Buffer layer/Cu at the COF(Chip On Film) which induced as the alternative plan about high concentration of a circuit or substrates according to demands of miniaturization and high efficiency of various electronic equipment. RF plasma equipment was applied to when plama pretreatment was performed for improvement of adhesive strength of PI and Cr as the buffer layer. Experimental fluents were a species of the buffer layer, depositied time and the ratio of $O_2$/Ar when performed to plasma pretreatment. The results are that Ni was superior to Cr at peel test according to a species of the buffer layer, peel strength and Cu THK were showed proportional relation to deposition structure of the same buffer layer and sample of the Cr depositied time(30 sec) and Cu depositied time(20 min) was showed good adhesion to peel test according to Cr's depositied time and Cu's depositied time. When perform PI's plasma pretreatment peel strength and $O_2$/Ar ratio were showed proportional relation. But $O_2$/Ar(2/5) was best condition since then decreased.

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Fabrication of Protein A-Viologen Hetero LB Film for Antibody Immobilization

  • 이헌주;최정우;이우창;오병근;이원홍
    • 한국생물공학회:학술대회논문집
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    • 한국생물공학회 2001년도 추계학술발표대회
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    • pp.859-862
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    • 2001
  • For the development of preferable immunosensor and protein chip, the viologen Langmuir-Blodgett (LB) multilayer was fabricated on the surface, and then protein A was adsorbed on the proposed viologen LB film by electrostatic attractive force. The Immunoglobulin G (IgG) labeled with fluorescence marker was self-assembled on the fabricated protein A film. The topographies of the deposited films were investigated by using atomic force microscope (AFM). The immobilization of IgG was verified by fluorescence spectrum. Such structures can be used as sublayers for various kinds of IgG immobilization toward immunosensors and protein chip.

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LCD Driver IC Assembly Technologies & Status

  • Shen, Geng-shin
    • 한국마이크로전자및패키징학회:학술대회논문집
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    • 한국마이크로전자및패키징학회 2002년도 International Symposium
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    • pp.21-30
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    • 2002
  • According the difference of flex substrate, (reel tape), there are three kind assembly types of LCD driver IC is COG, TCP and COF, respectively. The TCP is the maturest in these types for stability of raw material supply and other specification. And TCP is the major assembly type of LCD driver IC and the huge demand from Taiwan's large TFT LCD panel house since this spring. But due to its package structure and the raw material applied in this package, there is some limitation in fine pitch application of this package type, (TCP). So, COF will be very potential in compact and portable application comparison with TCP in the future. There are three kinds assembly methods in COF, one is ACF by using the anisotropic conductive film to connect the copper lead of tape and gold bump of IC, another is eutectic bonding by using the thermo-pressure to joint the copper lead of tape and gold bump of IC, and last is NCP by using non-conductive paste to adhere the copper lead of tape and gold bump of IC. To have a global realization, this paper will briefly review the status of Taiwan's large TFT panel house, the internal driver IC design house, and the back-end assembly house in the beginning. The different material property of raw material, PI tape is also compared in the paper. The more detail of three kinds of COF assembly method will be described and compared in this paper.

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다이오드 레이저를 이용한 Chip On Glass 접합에 관한 연구 (Study of Chip On Glass Bonding Method using Diode Laser)

  • 서명희;류광현;남기중
    • 한국정밀공학회:학술대회논문집
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    • 한국정밀공학회 2005년도 추계학술대회 논문집
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    • pp.423-426
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    • 2005
  • A new chip on glass(COG) technique by making use of a high power diode laser for LCD driver IC packaging of LCD has been developed. A laser joining technology of the connection of IC chip to glass panel has several advantages over conventional method such as hot plate joining: shorter process time, high reliability of joining, and better fur fine pitch joining. The reach time to cure temperature of ACF in laser joining is within 1 second. In this study, results show that the total process time of joining is reduced by halves than that of conventional method. The adhesion strength is mainly 100-250 N/cm. It is confirmed that the COG technology using high power diode laser joining can be applied to advanced LCDs with a fine pitch.

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Fabrication of a CNT Filter for a Microdialysis Chip

  • An, Yun-Ho;Song, Si-Mon
    • Molecular & Cellular Toxicology
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    • 제2권4호
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    • pp.279-284
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    • 2006
  • This paper describes the fabrication methods of a carbon nanotube (CNT) filter and a microdialysis chip. A CNT filter can help perform dialysis on a microfluidic chip. In this study, a membrane type of a CNT filter is fabricated and located in a microfluidic chip. The filter plays a role of a dialysis membrane in a microfluidic chip. In the fabrication process of a CNT filter, individual CNTs are entangled each other by amide bonding that is catalyzed by 1-Ethyl-3-(3-dimethylaminopropyl)carbodiimide (EDC) and N-hydroxysuccinimide (NHS). The chemically treated CNTs are shaped to form a CNT filter using a PDMS film-mold and vacuum filtering. Then, the CNT filter is sandwiched between PDMS substrates, and they are bonded together using a thin layer of PDMS prepolymer as adhesive. The PDMS substrates are fabricated to have a microchannel by standard photo-lithography technique.

IMT-2000용 초소헝 적층형 대역 통과 칩 필터 설계 및 제작 (Miniaturized Multilayer Band Pass Chip filter for IMT-2000)

  • 임혁;하종윤;심성훈;강종윤;최지원;최세영;오영제;김현재;윤석진
    • 한국세라믹학회지
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    • 제40권10호
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    • pp.961-966
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    • 2003
  • BiN $b_{0.975}$S $b_{0.025}$ $O_4$저온 동시 소결 세라믹 후막 및 적층 세라믹(Multi-Layer Ceramic, MLC) 공정 기술을 이용한 소형 마이크로파 필터를 설계 및 제작하였다. MLC 칩 대역 통과 필터(BPF)는 소형화와 낮은 가격이라는 장점을 가지고 있다. 제안된 필터는 stripline 공진기와 결합 캐패시터로 구성되며, IMT-2000용 단말기의 수신단 통과 대역에 적합하며 통과 대역 아래쪽 저지 대역에 감쇠극이 형성되도록 설계하였다. 상용 마이크로파 회로 및 구조 설계 tool를 이용하여 제안된 MLC칩 대역 통과 필터의 공진기 전자기적 결합량 변화 및 결합 캐패시턴스에 따른 필터의 주파수 특성, 특히 감쇠극의 위치 변화에 대해 살펴보았다. 제작된 MLC 칩 BPF의 주파수 특성은 시뮬레이션 결과와 매우 일치하였다.

Highly Miniaturized On-Chip $180^{\circ}$ Hybrid Employing Periodic Ground Strip Structure for Application to Silicon RFIC

  • Yun, Young
    • ETRI Journal
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    • 제33권1호
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    • pp.13-17
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    • 2011
  • A highly miniaturized on-chip $180^{\circ}$ hybrid employing periodic ground strip structure (PGSS) was realized on a silicon radio frequency integrated circuit. The PGSS was placed at the interface between $SiO_2$ film and silicon substrate, and it was electrically connected to top-side ground planes through the contacts. Owing to the short wavelength characteristic of the transmission line employing the PGSS, the on-chip $180^{\circ}$ hybrid was highly miniaturized. Concretely, the on-chip $180^{\circ}$ hybrid exhibited good radio frequency performances from 37 GHz to 55 GHz, and it was 0.325 $mm^2$, which is 19.3% of a conventional $180^{\circ}$ hybrid. The miniaturization technique proposed in this work can be also used in other fields including compound semiconducting devices, such as high electron mobility transistors, diamond field effect transistors, and light emitting diodes.

후막 리소그라피 공정을 이용한 내장형 캐패시터 개발에 관한 연구 (The Study on the embedded capacitor using thick film lithography)

  • 유찬세;박성대;박종철
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2002년도 추계학술대회 논문집 Vol.15
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    • pp.342-345
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    • 2002
  • As the size of chip components and module decreases, new patteming method for fine line and geometry is needed. So far, in LTCC(Low Temperature Cofired Ceramic) process, screen printing method has been used generally. But screen printing method has some disadvantages as follows. First, the geometry including line, vias, etc. smaller than $100{\mu}m$ can't be evaluated easily. Second, the patterned dimension is different from designed value, which makes distortion in charactersitics of not only chip components but also modules. Thick film lithography has advantages of thick film screen printing process, low cost and thin film process, fine line feasibility. Using this method, the line with $30{\mu}m$ width and the geometry with expected dimension can be evaluated. In this study, the fine line with $35{\mu}m$ line/space is formed and the embedded capacitor with very small tolerance is developed using thick film lithography.

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