• Title/Summary/Keyword: chip control

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Design of On-Chip Debugging System using GNU debugger (GNU 디버거를 이용한 온칩 디버깅 시스템 설계)

  • Park, Hyung-Bae;Ji, Jeong-Hoon;Xu, Jingzhe;Woo, Gyun;Park, Ju-Sung
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.1
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    • pp.24-38
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    • 2009
  • In this paper, we implement processor debugger based on OCD(On-Chip Debugger). Implemented debugger consist of software debugger that supports a functionality of symbolic debugging, OCD integrated into target processor as a function of debugging, and Interface & Control block which interfaces software debugger and OCD at high speed rates. The debugger supports c/assembly level debugging using software debugger as OCD is integrated into target processor. After OCD block is interfaced with 32bit RISC processor core and then implemented with FPGA, the verification of On-Chip Debugging System is carried out through connecting OCD and Interface & Control block, and SW debugger.

Analysis of the Chip Shape in Turing (I) -Analysis of the Chip Flow Angle- (선삭가공의 칩형상 해석 (I) -칩흐름각 해석-)

  • 이영문;최수준;우덕진
    • Transactions of the Korean Society of Mechanical Engineers
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    • v.15 no.1
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    • pp.139-144
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    • 1991
  • Chip flow angle is one of the important factors to be determined for the scheme of Chip Control. Up to now, however, a dependable way to predict the chip flow angle in practical cutting has not been established satisfactorily. In this paper a rather simple theoretical prediction of chip flow angle is tried based on some already widely confirmed hypotheses. The developed equation of chip flow angle contains the parameters of depth of cut d, feed rate f, nose radius $r_{n}$ side cutting edge angle $C_{s}$, side rake angle .alpha.$_{s}$ and back rake angle .alpha.$_{b}$. Theoretical results of chip flow angle given by this study bas been shown in a good agreement with experimental ones.s.s.s.s.

Nonlinear digital position control of brushless DC motors for direct drive robot (브러쉬없는 직류전동기의 비선형 디지탈 위치제어)

  • 홍기철;남광희
    • 제어로봇시스템학회:학술대회논문집
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    • 1990.10a
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    • pp.252-257
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    • 1990
  • For the position control of BL-DC motors, 2.phi.-3.phi. conversion unit, hysteresis band device, and PWM pulse generation are required. By utilizing a single-chip processor INTEL 8097BH, we cover all required functions. As a result, no analogue device is employed in this control scheme, so that it makes BL-DC motor controller simple and flexible. Furthermore, the single-chip processor is utilized for the nonlinear coordinate transformation which is necessary for the linearization of the motor system.

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Design of Microprocessor Embedded 2-Axis Motor Control Chip (Microprocessor Embedded 2-Axis Motor Control Chip의 설계)

  • Roh, Kyu-Jin;Choi, Sung-Hyuk;Won, Jong-Baek;Kim, Jong-Eun;Park, Jong-Sik
    • Proceedings of the KIEE Conference
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    • 2001.11c
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    • pp.193-196
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    • 2001
  • In this paper we designed CAMC-SP, the microprocessor embedded 2-axis motor control chip which controls a precise pulse motor by generating the pulse needed to control step motor, DC servo and AC servo motor. This design enables to decrease costs and to minimize a size. First we designed risc type 8-bit microprocessor compatible with PIC16C84, second we designed pulse motor controller. CAMC-SP is integrated of those two block. We designed CAMC-SP by VHDL and we testified to the Performance of it by performing functional simulation.

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ASIC Design for Vector Control of Induction Motor (유도전동기의 벡터제어 ASIC 설계)

  • Park, H.J.;Kim, S.J.;Lee, H.J.;Kwon, Y.A.
    • Proceedings of the KIEE Conference
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    • 2000.07b
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    • pp.1099-1101
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    • 2000
  • ASIC chip design for motor control has been a subject of increasing interest since an effective methodology of system-on-a-chip design was developed. This paper investigates the design and implementation of ASIC chip for vector control of induction motor using VHDL which is a standard hardware description language. The vector control algorithm is finally implemented using a simple electronic circuit based on FPGA. The performance of the designed ASIC is verified through simulation and experiment.

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Single-Chip Microprocessor Based Instantaneous Voltage Control of Inverter for UPS (Single-Chip 마이크로프로세서를 이용한 UPS용 인버터의 순시전압제어)

  • 최재호;박세현;민완기;김재식
    • The Proceedings of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.6 no.6
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    • pp.49-57
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    • 1992
  • This paper proposes a Intel 8097 single-chip microprocessor based instantaneous voltage control scheme of inverter for UPS(Uninterruptible Power Supply). There microprocessors are used to control the output voltage and frequency of the inverter, the synchronization with by-pass, and the switching of the static switch. And the status and operating conditions of UPS systems is monitored by micro processor. The inverter output voltage is controlled instantaneously with a double regulation loop so that it has very good dynamic response for the varying loads or nonlinear loads as a rectifier. And also, the software and hardware of control system is described. From simulation and experimental results, it is shown that the proposed scheme has very good performance.

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AE센서와 감지판을 이용한 칩 형태 감지에관한 연구

  • 윤재웅
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 1993.04b
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    • pp.300-304
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    • 1993
  • Chip formation control is an important problem in the automation of manufacturing process, since the continuous chip can cause catastrophic failures of the tooling and entangle the workpiece causing damage. However, it is impossible to predict chip form correctly due to the complex nature of cutting process. In order to detect the chip form for unmanned manufacturing, a new identification method is proposed. The feasibility of using acoustic emission signals from the sensing plate for identification of chip form is investigated. Experiments were conducted under the various cutting conditions. When the acoustic emission sensor is attached to the sensing plate, it turns out that the moving averaged AE signals correlated well with the collision of segmented chips with the plate. The sensitivity of moving averaged AE signals to chip congestions due to continuous chip formation is illustrated as well.

Processing Control of 0402 Chip used Pb-free Solder in SMT process (무연솔더 적용한 0402 칩의 공정제어)

  • Bang, Jeong-Hwan;Lee, Chang-U;Lee, Jong-Hyeon;Kim, Jeong-Han;Nam, Won-U
    • Proceedings of the KWS Conference
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    • 2007.11a
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    • pp.218-221
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    • 2007
  • The surface mounting technology of 0402 electric chip part is necessary to fabricate a high density and multi-functional module, but there is a limitation of the technology, like as a bridge and self-alignement. This work estimated SMT processing factors of 0402 chip. To obtain optimum SMT process, we evaluated effects of stencil thickness, shape of hole on printability and mountability. Printability shows best results under the thickness of $80{mu}m$ with circle hole shape and 90% square hole shape. In case of chip mounting process, chip mis-alignment and bridge was occurred rarely in same conditions. In more thin stencil thickness, $50{mu}m$, strength of 1005 chip parts was poor, because of amount of printed solder was insufficient.

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Thermal Design of PCR Chip for LOC (랩온어칩을 위한 중합효소 연쇄반응 칩의 열설계)

  • Kim, Deok-Jong;Kim, Jae-Yun;Park, Sang-Jin;Heo, Pil-U;Yun, Ui-Su
    • 연구논문집
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    • s.33
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    • pp.17-25
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    • 2003
  • In this work, thermal design of a PCR chip for LOC is systematically conducted. From the numerical simulation of a PCR chip based on the finite volume method, how to control the average temperature of a PCR chip and the temperature difference between the denaturation zone and the annealing zone is presented. The average temperature is shown to be controlled by adjusting heat input and a cooler as well as a heater is shown to be necessary to obtain three individual temperature zones for polymerase chain reaction. To reduce the time required, a heat sink for the cooler is not included in the calculation domain for the PCR chip and heat sink design is conducted separately by using a compact modeling method, the porous medium approach.

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Generation of GCP Chip in Landsat-7 ETM+

  • Yoon, Geun-Won;Yun, Young-Bo;Park, Jong-Hyun
    • Proceedings of the KSRS Conference
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    • 2002.10a
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    • pp.29-33
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    • 2002
  • In order to utilize remote sensed images widely, it is necessary to correct geometrically. Traditional approaches to geometric correction require substantial human operations. Such substantial human operations make geometric correction a laborious and tedious process. In this paper, We introduce concept of GCP(Ground Control Point) Chip and generate a GCP Chip for automatic geometric correction. GCP Chip is small image patch which has a GCP in reference coordinate image. GCP Chip will be used to match new images in geometric correction. We generated GCP chip using Landsat-7 ETM+ panchromatic band image in this study. Henceforth this result will support automatic process in geometric correction.

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