• 반도체디스플레이기술학회지
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• 제18권4호
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• pp.134-137
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• 2019

In this paper, the data retention characteristics were analyzed to find out the thickness effect on the trap energy distribution of silicon nitride in the silicon-oxide-nitride-oxide-silicon (SONOS) flash memory devices. The nitride films were prepared by low pressure chemical vapor deposition (LPCVD). The flat band voltage shift in the programmed device was measured at the elevated temperatures to observe the thermal excitation of electrons from the nitride traps in the retention mode. The trap energy distribution was extracted using the charge decay rates and the experimental results show that the portion of the shallow interface trap in the total nitride trap amount including interface and bulk trap increases as the nitride thickness decreases.

• Bulletin of the Korean Chemical Society
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• 제33권2호
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• pp.469-472
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• 2012

Intensity modulated photocurrent spectroscopy and intensity modulated photovoltage spectroscopy were investigated to measure the dynamic response of charge transfer and recombination in the standard, $TiCl_4$-treated and the combined scattering layer electrode dye-sensitized solar cells (DSSCs). IMPS and IMVS provided transit time ($\tau_n$), lifetime ($\tau_r$), diffusion coefficient ($D_n$) and effective diffusion length ($L_n$). These expressions are derived that generation, collection, and recombination of electrons in a thin layer nanocrystalline DSSC under conditions of steady illumination and with a superimposed small amplitude modulation. In this experimental, IMPS/IMVS showed that the main effect of $TiCl_4$ treatment is to suppress the recombination of photogenerated electrons, thereby extending their lifetime. And the Diffusion coefficient of combined scattering layer electrode is $6.10{\times}10^{-6}$ higher than that of the others, resulting in longer diffusion length.

• The Korean Journal of Ceramics
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• 제1권1호
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• pp.40-44
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• 1995

Ethylammonium-layered aluminosilicates intercalates were prepared by ion exchange reaction between the layered silicates with different layer changes density of 0.32∼0.41 e per unit formula and ethylammonium chloride. A kinetic study on the thermal deintercalation of the ethylammonium-layered silicate intercalates was carried out by range of 350℃ to 480℃ (heating rate of 10℃/min). Based on the Ozawa's method, the activation energies of the thermal deintercalation reaction were estimated as 171.2∼133.0 kJ/mol, which increase linearly with the layer charge densities.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2011년도 제40회 동계학술대회 초록집
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• pp.430-430
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• 2011

Graphene, one single atomic layer of graphite, has attracted extensive attention in various research fields since its first isolation from graphite. Application in the future electronics requires better understanding and manipulation of electronic properties of graphene supported on various solid substrates. Here, we present a study on charge doping and morphology of graphene prepared on atomically flat and highly polar mica substrates. Ultra-flat single-layer graphene was prepared by micro-exfoliation of graphite followed by deposition on cleaved mica substrates. Atomic force microscopy (AFM) revealed presence of ultra-thin water films formed in a layer-by-layer manner between graphene and mica substrates. Raman spectroscopy showed that a few angstrom-thick water films efficiently block electron transfer from graphene to mica. Hole doping in graphene caused by underlying mica substrates was also visualized by scanning Kelvin probe microscopy (SKPM).

• 대한전기학회논문지:전기물성ㆍ응용부문C
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• 제48권5호
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• pp.281-284
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• 1999

In this paper, the electrical conduction, breakdown strength and dielectric properties were investigated in the interfaces of PET films. The volume resistivity and breakdown strength were decreased; especially the specimens with semiconductive layer showed the lowest breakdown strength. This decrease of electrical properties was appeared by increasing charge density in inhomogeneous layer of PET. The dielectric properties of PET did not show significant difference with PET/PET but the films with semiconductive interface layer showed the increase in capacitance and $tan\delta$ was affected by the PET rather than semiconductive layer. It is assumed that the variation of $tan\delta$ was affected by the dielectric polarization and the leakage current(charge).

• 한국재료학회지
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• 제29권7호
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• pp.408-411
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• 2019

ZTO/n-Si thin film is produced to investigate tunneling phenomena by interface characteristics by the depletion layer. For diversity of the depletion layer, the thin film of ZTO is heat treated after deposition, and the gpolarization is found to change depending on the heat treatment temperature and capacitance. The higher the heat treatment temperature is, the higher the capacitance is, because more charges are formed, the highest at $150^{\circ}C$. The capacitance decreases at $200^{\circ}C$ ZTO heat treated at $150^{\circ}C$ shows tunneling phenomena, with low non-resistance and reduced charge concentration. When the carrier concentration is low and the resistance is low, the depletion layer has an increased potential barrier, which results in a tunneling phenomenon, which results in an increase in current. However, the ZTO thin film with high charge or high resistance shows a Schottky junction feature. The reason for the great capacitance increase is the increased current due to tunneling in the depletion layer.

• E2M - 전기 전자와 첨단 소재
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• 제7권5호
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• pp.376-382
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• 1994

In this study we developed a program(DEVSIM) to simulate the two dimensional distribution of the electrostatic potential and the electric field of the arbitrary structure consisting of GaAs/AlGaAs semiconductor and metal as well as dielectric. By the comparision of the electric field distribution of GaAs MESFETs with the various recess gates we proposed a suitable device structure to improve the breakdown characteristics of MESFET. According to the results of simulation the breakdown characteristics were improved as the thickness of the active epitaxial layer was decreased. And the planar structure, which had the highly doped layer under the drain for the ohmic contact, was the worst because the highly doped layer prevented the space charge layer below the gate from extending to the drain, which produced the narrow spaced distribution of the electrostatic potential contours resulting in the high electric field near the drain end. Instead of the planar structure with the highly doped drain the recess gate structure having the highly doped epitaxial drain layer show the better breakdown characteristics by allowing the extention of the space charge layer to the drain. Especially, the structure in which the part of the drain epitaxial layer near the gate show the more improvement of the breakdown characteristics.

• 전자공학회논문지T
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• 제36T권3호
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• pp.19-25
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• 1999

플라즈마 중합법과 dip-coating법에 의해 이층형 유기 감광체를 제조하였다. 알루미늄 기판위에 장벽 층으로 Al₂O₃막을 만들었고, 전하 생성층으로 H₂ phthalocyanine(H₂Pc)를, 전하 수송층으로는 Poly 9-Vinylcarbazole을 채택하여 CGL/CTL의 이층 구조가 되도록 하였다. 플라즈마 중합법과 진공 증착법에 의해 각각 H₂ phthalocyanine 박막을 제조하여 흡광 특성을 검토한 결과 진공 증착막의 경우 613.6[nm]와 694.8[㎚]에서 흡수 피크가 관찰되었으나 플라즈마 중합막에서는 600-700[㎚]사이에서 완만한 피크가 관찰되었다. PVCz막의 표면전위는 인가한 코로나 방전 전압과 PVCz의 두께가 증가함에 따라 증가하였고, 암 감 쇠 특성과 광 감쇠 시간 그리고 잔류 시간도 PVCz의 두께의 증가와 함께 증가하였다. 15[㎛] 두께의 PVCz의 표면 전하량을 계산한 결과, 인가 전위 -600[V]에서 134[nc/㎠]이었으며 H₂Pc의 전하 생성 효율은 0.034이었다.

• 한국세라믹학회지
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• 제49권6호
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• pp.631-636
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• 2012

Conventional SONOS (poly-silicon/oxide/nitride/oxide/silicon) type memory is associated with a retention issue due to the continuous demand for scaled-down devices. In this study, $Al_2O_3/Y_2O_3/SiO_2$ (AYO) multilayer structures using a high-k $Y_2O_3$ film as a charge-trapping layer were fabricated for nonvolatile memory applications. This work focused on improving the retention properties using a $Y_2O_3$ layer with different tunnel oxide thickness ranging from 3 nm to 5 nm created by metal organic chemical vapor deposition (MOCVD). The electrical properties and reliabilities of each specimen were evaluated. The results showed that the $Y_2O_3$ with 4 nm $SiO_2$ tunnel oxide layer had the largest memory window of 1.29 V. In addition, all specimens exhibited stable endurance characteristics (program/erasecycles up to $10^4$) due to the superior charge-trapping characteristics of $Y_2O_3$. We expect that these high-k $Y_2O_3$ films can be candidates to replace $Si_3N_4$ films as the charge-trapping layer in SONOS-type flash memory devices.

• 마이크로전자및패키징학회지
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• 제24권3호
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• pp.47-52
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• 2017

본 연구에서는 멀티 레벨 플래쉬 메모리 셀의 프로그램 포화영역에서 트랩된 전하 손실 효과에 의한 데이터 보유 특성에 대한 연구를 진행하였다. Incremental Step Pulse Programming(ISPP) 방식에 의한 전압 인가 시 셀의 문턱 전압은 선형적으로 증가하다 일정 수준 이상의 전압에 도달하면 더 이상 증가 하지 않는 현상을 문턱 전압 포화 현상이라고 한다. 이는 프로그램 시 플로팅 게이트에 축적된 전하가 Inter-Poly Dielectric(IPD) 층을 통해 컨트롤 게이트로 빠져 나가는 것에 원인이 있다. 본 연구는 열적 스트레스에 의한 문턱 전압의 보유 특성이 선형 영역에서보다 포화 영역에서 심각하게 저하되는 현상의 원인규명에 대한 연구이다. 이를 평가하기 위해 프로그램 후 데이터 보유(data retention) 특성 평가 및 반복 읽기 측정을 진행하였다. 또한 여러 가지 측정 패턴을 이용한 측정 조건 분리 실험을 통해 검증하였다. 그 결과 포화 영역에서의 문턱 전압 저하 특성의 원인은 포화 시 가해진 높은 전압에 의해 플로팅 게이트와 컨트롤 게이트 사이의 인터 폴리 절연막 IPD 층의 질화막에 트랩된 전자의 손실 효과인 것으로 나타났다. IPD 층의 질화막에 전하 트랩 현상이 발생하고 열적 스트레스가 가해진 후 트랩된 전하가 다시 빠져 나오면서 문턱 전압의 저하가 발생하고 이는 소자의 신뢰성에 나쁜 영향을 미친다. 낸드 플래쉬 메모리 셀의 프로그램 포화 영역 문턱 전압을 증가시키기 위해서는 질화막에 트랩된 전하의 손실을 고려하여 플로팅 게이트의 전하저장 능력을 향상시켜야 하며 IPD 막에 대한 주의 깊은 설계가 필요하다.