• Proceedings of the Korea Multimedia Society Conference
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• 2001.11a
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• pp.681-685
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• 2001

본 논문에서는 난수 발생기로써 랜덤성이 우수하고 하드웨어 설계시 고속성이 보장되어 LFSR(Linear Feedback Shift register) 대안으로 소개되고 있는 셀룰라 오토마타(CA: Cellular Automata)를 소개하고 이를 이용한 새로운 블록 암호 알고리즘을 제안한다. 제안된 블록 암호 알고리즘은 Fiestel 구조로써 라운드 함수와 키 스케쥴링 모두를 셀룰러 오토마타를 이용하여 구성함으로써 구현의 편이성과 고속성을 추구하였다. 제안 알고리즘에 대한 간단한 통계적 검정과 성능평가를 통해 기존 표준 알고리즘고의 비교를 수행하였다.

• Proceedings of the Korea Multimedia Society Conference
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• 2012.05a
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• pp.332-335
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• 2012

본 논문에서는 CAT(Cellular Automata Transform) 성질을 이용하여 의료 영상의 단계적 변환을 제안한다. 적용 방법은 먼저, CAT 초기 값과 다양한 규칙에 따라 단계적으로 Gateway Values와 rule matrix에 대한 전이행렬 T를 이용하여 CAT 기저함수를 생성한다. 그런 다음, 생성된 CAT 기저함수를 의료 영상에 곱하여 영상을 다양한 방법으로 변환한다. 마지막으로, 키 공간 분석을 통하여 제안한 방법이 높은 영상 변환 및 보안의 성질을 가졌음을 검증한다.

• Journal of applied mathematics & informatics
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• v.27 no.5_6
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• pp.1331-1342
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• 2009

In this paper, we analyze the behavior of the state transition of nongroup CA with a single attractor over GF($2^p$)(p > 1), and propose the algorithm for the construction of the state transition diagram of a Single Attractor CA(SACA) over GF($2^p$) which is very different from the construction algorithm for the state transition diagram of GF(2) SACA.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2004.05b
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• pp.49-52
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• 2004

In this paper, we analyze Pseudo-Noise (PN) sequences generated by a 90/150 maximum-length Null Boundary Cellular Automata.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.10 no.6
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• pp.1132-1136
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• 2006

In this paper, we analyze reachable/nonreachable states of 3-neighborhood cellular automata and propose the algorithm finding the predecessor of a reachable state.

• Proceedings of the Korea Multimedia Society Conference
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• 2003.05b
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• pp.299-303
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• 2003

In this paper, We proposed a hash function based on the concept of 2-dimensional cellular automata which is a method of analyzing dynamical systems. The proposed hash function is designed for using and disusing key. And the key size is variable from 128 bits.

• Proceedings of the Korean Information Science Society Conference
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• 2001.10a
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• pp.703-705
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• 2001

본 논문에서는 셀룰라 오토마타(Cellular Automata, CA)를 이용한 MSB곱셈기를 제안한다. 본 논문에서 제안한 구조는 PBCA(Periodic Boundary CA)의 특성을 AOP의 특성과 조화시킴으로써 정규성을 높이고 시간지연을 줄일 수 있는 장점을 가지고 있다. 이 곱셈기는 지수연산을 위한 하드웨어 설계에 효율적으로 이용될 수 있을 것이다.

• The Magazine of the IEIE
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• v.24 no.3
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• pp.32-40
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• 1997

• Journal of the Korean Institute of Telematics and Electronics S
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• v.35S no.11
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• pp.88-95
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• 1998

This paper is the result of constructing information processing system such as living creatures' brain based on artificial life techniques. The living things are best information processing system in themselves. One individual is developed from a generative cell. And a species of this individual has adapted itself to the environment through evolution. In this paper, we propose a new method of designing neural networks using biological inspired developmental and evolutionary concept. Ontogeny of organism is embodied in cellular automata(CA) and phylogeny of species is realized by evolutionary algorithms(EAs). We call 'Evolving Cellular Automata Neural Systems' as ECANSI. The connection among cells is determined by the rule of cellular automata. In order to obtain the best neural networks in given environment, we evolve the arragemetn of initial cells. The cell, that is a neuron of neural networks, is modeled on chaotic neuron with firing or rest state like biological neuron. A final output of network is measured by frequency of firing state. The effectiveness of the proposed scheme is verified by applying it to Exclusive-OR and parity problem.

• Journal of Advanced Navigation Technology
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• v.20 no.1
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• pp.65-71
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• 2016

Quantum-dot cellular automata (QCA) consists of nano-scale cells and demands very low power consumption so that it is one of the alternative technologies that can overcome the limits of scaling CMOS technologies. Typical BCD-EXCESS 3 code converters using QCA have not considered the scalability so that the architectures are not suitable for a large scale circuit design. Thus, we design a BCD-EXCESS 3 code converter with scalability using QCADesigner and verify the effectiveness by simulation. Our structure have reduced 32 gates and 7% of garbage space rate compare with typical URG BCD-EXCESS 3 code converter. Also, 1 clock is only needed for circuit expansion of our structure though typical QCA BCD-EXCESS 3 code converter demands 7 clocks.