• 제목/요약/키워드: capacitance - voltage (C-V)

검색결과 321건 처리시간 0.022초

대용량 변압기유의 전기적특성에 관한 연구 (A Study on the Electrical Properties of Transformer Oils for Large Power)

  • 이용우;김왕곤;홍진웅
    • 한국안전학회지
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    • 제11권3호
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    • pp.81-88
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    • 1996
  • In order to investigate the electrical properties of transformer oils for large power, the characteristics of AC and Impulse breakdown in gap length of 1.0~2.5mm and that of volume resistivity were researched in temperature range of 20~$100^{\circ}C$. An geometrical capacitance of electrode with coaxial cylindrical shape for measuring the volume resistivity was 16pF, and highmegohm meter with model no. VMG-1000 was used, and also the applied voltage were DC 100, 250 and 500V. In the dependance of breakdown characteristics due to electrode gap length, it was confirmed that breakdown voltage was nearly uniform by volume effect according to the increase of gap. In the characteristics for AC breakdown, the dielectric strength was increased to $90^{\circ}C$ but decreased over $90^{\circ}C$, and also in case of impulse breakdown, it was increased to 7$0^{\circ}C$ and at dated $70^{\circ}C$ over in temperature range. The calculated mobility of oils in the characteristics for impulse breakdown were about $10^{-5}$~$10^{-4}cm^2/V{\cdot}S$, and the value of volume resistivity was almost invariable in low temperature range, regardless of voltage by the stable thermal properties, and it indicated a peak at $50^{\circ}C$ and had a sudden change to decrease over that temperature, and also the value of volume resistivity in 250V/mm at $80^{\circ}C$ is suitable for the International electrical standards, it was confirmed.

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${N_2}O$ 플라즈마 전처리와 엑시머 레이저 어닐링을 통한 $150^{\circ}C$ 공정의 실리콘 산화막 게이트 절연막의 막질 개선 효과 (High quality $SiO_2$ gate Insulator with ${N_2}O$ plasma treatment and excimer laser annealing fabricated at $150^{\circ}C$)

  • 김선재;한상면;박중현;한민구
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2006년도 추계학술대회 논문집 전기물성,응용부문
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    • pp.71-72
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    • 2006
  • 플라스틱 기판 위에 유도 결합 플라즈마 화학적 기상 증착장치 (Inductively Coupled Plasma Chemicai Vapor Deposition, ICP-CVD) 를 사용하여 실리콘 산화막 ($SiO_2$)을 증착하고, 엑시머레이저 어널링 (Excimer Laser Annealing, ELA) 과 $N_{2}O$ 플라즈마 전처리를 통해, 전기용량-전압(Capacitance-Voltage, C-V) 특성과 항복 전압장 (Breakdown Voltage Field) 과 같은 전기적 특성을 개선시켰다. 에너지 밀도 $250\;mJ/cm^2$ 의 엑시머 레이저 어닐링은 실리콘 산화막의 평탄 전압 (Flat Band Voltage) 을 0V에 가까이 이동시키고, 유효 산화 전하밀도 (Effective Oxide Charge Density)를 크게 감소시킨다. $N_{2}O$ 플라즈마 전처리를 통해 항복 전압장은 6MV/cm 에서 9 MV/cm 으로 향상된다. 엑시머 레이저 어닐링과 $N_{2}O$ 플라즈마 전처리를 통해 평탄 전압은 -9V 에서 -1.8V 로 향상되고, 유효 전하 밀도 (Effective Charge Density) 는 $400^{\circ}C$에서 TEOS 실리콘 산화막을 증착하는 경우의 유효 전하 밀도 수준까지 감소한다.

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GaP 산화막 특성에 관하여 (On the Characteristics of Oxide Film on Gap)

  • 박재우;문동찬;김선태
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1988년도 추계학술대회 논문집 학회본부
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    • pp.193-195
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    • 1988
  • The native oxide films were thermally and anodically formed on the n-GaP substrates grown by SSD method and measured this oxide thickness and the chemical composition and the electrical properties with formation condition. The chemical composition of themally oxidized GaP film was composed of mostly $GaPO_4$ at temperature below $800^{\circ}C$ and mostly $\beta-Ga_{2}O_{3}$ above $800^{\circ}C$. But The chemical composition of anodically oxidized GaPfilm was composed of the mixture of $Ga_{2}O_{3}$ and $P_{2}O_{5}$. The barrier height of Al/oxide/n-Gap which was formed at $700^{\circ}C$ by thermal oxidation method were 1.10eV, 1.03eV in Current-Voltage measurement. Interface charge density were $4{\times}10^{12}q(C/cm^2)$ and $3{\times}10^{12}q(C/cm^2)$ in Capacitance-Voltage measurement respectively.

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RF 스퍼터링법에 의한 세라믹 박막의 열처리온도 특성 (Properties of Annealing Temperature of Ceramic Thin Film by RF Sputtering Method)

  • 김진사
    • 전기학회논문지P
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    • 제58권4호
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    • pp.538-540
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    • 2009
  • The SBN thin films were deposited at substrate temperature of 300[$^{\circ}C$] on Pt-coated electrode (Pt/Ti/$SiO_2$/Si(100)) using RF sputtering method. The grain and crystallinity of SBN thin films were increased with the increase of annealing temperature. The dielectric constant(150) of SBN thin film was obtained by annealing temperature above 750[$^{\circ}C$]. The voltage dependence of dielectric loss showed a value within 0.01 in voltage ranges of -5~+5[V]. The capacitance characteristics showed a stable value of about 0.7[${\mu}F/cm^2$].

Supercapacitor용 $V_{2}O_{5}$ Composite의 전압영역에 따른 충방전 특성 (Charge/discharge Properties of $V_{2}O_{5}$ Composite with different Voltage range for Supercapacitor)

  • 김명산;김종욱;구할본;박복기
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2000년도 하계학술대회 논문집
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    • pp.507-510
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    • 2000
  • The purpose of this study is to research and developV$_2$O$_{5}$-SP270 composite electrode for supercapacitor. Property of an electrical double layer capacitor depend both on the technique used to prepare the electrode and on the current collector structure. The study is to research that V$_2$O$_{5}$-carbon composite electrode for supercapacitor with different voltage range. Suprcapacitor cell of V$_2$O$_{5}$-SP270 composite electrode with 25PVDFLiC1O$_4$PC$_{10}$ polymer electrolyte bring out good capacitor performance below 3V. The discharge capacitance of SP270 in 1st cycles was 13F/g at 0.1mA/cm$^2$, 3V. We performed cycle voltammogram, charge/discharge property.y.rty.y.

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고집적 반도체 배선용 Cu(Mg) 박막의 전기적, 기계적 특성 평가 (Electrical and Mechanical Properties of Cu(Mg) Film for ULSI Interconnect)

  • 안재수;안정욱;주영창;이제훈
    • 마이크로전자및패키징학회지
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    • 제10권3호
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    • pp.89-98
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    • 2003
  • 반도체 소자의 배선용 재료로서 사용가능한 합금원소 Mg를 첨가한 Cu(Mg) 박막의 기계 및 전기적 특성 변화를 조사하였다. Cu(2.7at.%Mg) 박막은 열처리를 할 경우 Cu 박막에 비하여 표면거칠기는 약 1/10 정도로 줄고 $SiO_2$와의 접착력도 2배 이상 향상된 결과를 나타내었다. 또한 $300^{\circ}C$이상의 온도에서 10분 이상 열처리를 할 경우 급격한 저항감소를 보여주었는데 이는 Mg 원소의 확산으로 인해 표면 및 계면에서 Mg 산화물이 형성되고 내부에는 순수 Cu와 같이 되었기 때문이다. 경도 및 열응력에 대한 저항력도 Cu박막에 비해 우수한 것으로 나타났으며 열응력으로 인해 Cu 박막에 나타나던 표면 void가 Cu(Mg) 박막에서는 전혀 관찰되지 않았다. EM Test 결과 lifetime은 2.5MA/$cm^2$, $297^[\circ}C$에서 순수 Cu 라인보다 5배 이상 길고 BTS Test 결과 Capacitance-Voltage 그래프의 플랫 밴드 전압(V$_{F}$ )의 shift현상이 Cu에서는 나타났지만 Cu(Mg) 박막에서는 발생하지 않는 우수한 신뢰성을 보여주었다. 누설전류 측정을 통한 $SiO_2$의 파괴시간은 Cu에 비하여 약 3배 이상 길어 합금원소에 의한 확산방지 효과가 있음을 확인하였다.

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Preparation of Field Effect Transistor with $(Bi,La)Ti_3O_{12}$ Gate Film on $Y_2O_3/Si$ Substrate

  • Chang Ho Jung;Suh Kwang Jong;Suh Kang Mo;Park Ji Ho;Kim Yong Tae;Chang Young Chul
    • 마이크로전자및패키징학회지
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    • 제12권1호
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    • pp.21-26
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    • 2005
  • The field effect transistors (FETs) were fabricated ell $Y_2O_3/Si(100)$ substrates by the conventional memory processes and sol-gel process using $(Bi,La)Ti_3O_{12}(BLT)$ ferroelectric gate materials. The remnant polarization ($2Pr = Pr^+-Pr^-$) int Pt/BLT/Pt/Si capacitors increased from $22 {\mu}C/cm^2$ to $30{\mu}C/ cm^2$ at 5V as the annealing temperature increased from $700^{\circ}C$ to $750^{\circ}C$. There was no drastic degradation in the polarization values after applying the retention read pulse for $10^{5.5}$ seconds. The capacitance-voltage data of $Pt/BLT/Y_2O_3/Si$ capacitors at 5V input voltage showed that the memory window voltage decreased from 1.4V to 0.6V as the annealing temperature increased from $700^{\circ}C$ to $750^{\circ}C$. The leakage current of the $Pt/BLT/Y_2O_3/Si$ capacitors annealed at $750^{\circ}C$ was about $510^{-8}A/cm^2$ at 5V. From the drain currents versus gate voltages ($V_G$) for $Pt/BLT/Y_2O_3/Si(100)$ FET devices, the memory window voltages increased from 0.3V to 0.8V with increasing tile $V_G$ from 3V to 5V.

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$SrTiO_3$계 세라믹의 전기적인 특성 (Electrical Properties of $SrTiO_3$-based Ceramics)

  • 김진사;소병문;이준웅
    • 한국전기전자재료학회논문지
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    • 제11권1호
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    • pp.41-47
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    • 1998
  • The (Sr$_1$-\ulcorner.Ca\ulcorner)TiO$_3$(0.05 x 0.2) ceramics were fabricated to form semiconducting ceramics by sintering at about 1350[$^{\circ}C$] in a reducing atmosphere($N_2$gas). After being fired in a reducing atmosphere, metal oxides(CuO) was painted on the both surface of the specimens to diffuse to the grain boundary. The capacitance changes slowly and almost linearly in the temperature region of -40~+85[$^{\circ}C$]. The capacitance characteristics appears a stable value within $\pm$10[%]. According to increase of the frequency as a functional of temperature, all specimens used in this study showed the dielectric relaxation, and the relaxation frequency was above 10\ulcorner[Hz]. The capacitance is almost unchanged below about 20[V] but it decrease slowly over 20[V]. The voltage-current characteristics of specimens observed in the temperature range of 25~125[$^{\circ}C$] as the current increased appears that it is due to space charge condensed to interface between grain and grain boundary.

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$ZrO_2$가 적용된 MIM Capacitor의 신뢰성 분석

  • 이소영;조성원;권혁민;한인식;박영석;박상욱;이희덕
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2009년도 추계학술대회 논문집
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    • pp.73-73
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    • 2009
  • In this paper, electrical properties in $ZrO_2$-based high-k metal MIM capacitors were studied. Linear voltage coefficient of capacitance (VCC) was 72.375 ppm/V, quadratic VCC was $174.581ppm/V^2$, temperature coefficients of capacitance was $111.01ppm/^{\circ}C$ at 100kHz and $89.497ppm/^{\circ}C$ at 1MHz, which indicate the temperature dependence of electrical parameter for MIM capacitors.

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Optically Controlled Silicon MESFET Modeling Considering Diffusion Process

  • Chattopadhyay, S.N.;Motoyama, N.;Rudra, A.;Sharma, A.;Sriram, S.;Overton, C.B.;Pandey, P.
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제7권3호
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    • pp.196-208
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    • 2007
  • An analytical model is proposed for an optically controlled Metal Semiconductor Field Effect Transistor (MESFET), known as Optical Field Effect Transistor (OPFET) considering the diffusion fabrication process. The electrical parameters such as threshold voltage, drain-source current, gate capacitances and switching response have been determined for the dark and various illuminated conditions. The Photovoltaic effect due to photogenerated carriers under illumination is shown to modulate the channel cross-section, which in turn significantly changes the threshold voltage, drainsource current, the gate capacitances and the device switching speed. The threshold voltage $V_T$ is reduced under optical illumination condition, which leads the device to change the device property from enhancement mode to depletion mode depending on photon impurity flux density. The resulting I-V characteristics show that the drain-source current IDS for different gate-source voltage $V_{gs}$ is significantly increased with optical illumination for photon flux densities of ${\Phi}=10^{15}\;and\;10^{17}/cm^2s$ compared to the dark condition. Further more, the drain-source current as a function of drain-source voltage $V_{DS}$ is evaluated to find the I-V characteristics for various pinch-off voltages $V_P$ for optimization of impurity flux density $Q_{Diff}$ by diffusion process. The resulting I-V characteristics also show that the diffusion process introduces less process-induced damage compared to ion implantation, which suffers from current reduction due to a large number of defects introduced by the ion implantation process. Further the results show significant increase in gate-source capacitance $C_{gs}$ and gate-drain capacitance $C_{gd}$ for optical illuminations, where the photo-induced voltage has a significant role on gate capacitances. The switching time ${\tau}$ of the OPFET device is computed for dark and illumination conditions. The switching time ${\tau}$ is greatly reduced by optical illumination and is also a function of device active layer thickness and corresponding impurity flux density $Q_{Diff}$. Thus it is shown that the diffusion process shows great potential for improvement of optoelectronic devices in quantum efficiency and other performance areas.