• Proceedings of the KIEE Conference
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• 2006.07a
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• pp.466-467
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• 2006

Several synthetic testing methods have widely been used for the performance evaluation of ultra high-voltage circuit breaker. Among these synthetic method, in the paper, capacitance switching testing method which can meet the test requirements and increase the testing capacity has been proposed. This method is made up of two separated sources of short-circuit generator for current source and L-C resonance circuit for voltage source. By using this method, KERI will perform the performance evaluation of capacitive current switching performance for the 800kV GCB(Gas Circuit Breaker).

• 한국정보디스플레이학회:학술대회논문집
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• 2005.07a
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• pp.472-475
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• 2005

The electrical performances of liquid crystal (LC) cells with chloromethylated polyimide (CMPI) alignment layers were investigated. The CMPI layer was previously reported as a multifunctional layer that does role of LC alignment and planarization layer as well as photo-alignment material with high photosensitivity and excellent thermal stability. The capacitance-voltage (C-V) characteristics of LC cells with CMPI alignment layers were measured. Mechanical rubbing of the CMPI layer did not generate much difference in residual DC when compared to commercial PI. However, the LC cell with photo-oxidation CMPI layer shows a high residual DC value and a corresponding low voltage holding ratio (VHR) due to the photo-induced ionic charges on the alignment layer.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.30A no.11
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• pp.105-112
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• 1993

Oxide and reoxidized-nitrided-oxide were formed by furnace oxidation and rapid thermal processing (RTP). MOS capacitor and n-MOSFET's with those films as gate insulators were fabricated. The electrical characteristics of insulators were evaluated by current-voltage, high-frequency capacitance-voltage (C-V), and time-dependent dielectrical breakdown (TDDB) measurements. The hot carrier effects of MOSFET's were also investigated. Time-dependent dielectrical breakdown (TDDB) characteristics show that the life time of reoxidized-nitrided-oxide films is about 3 times longer than that of oxides. Hot carrier effects reveal that the life time of MOSFET's with reoxidized-nitrided-oxides is about 3 times longer than that of MOSFET's with oxides. Therefore, it is found that the reliability of dielectric films estimated by the hot carrier effects of MOSFET's is consistent with that of dielectric films from TDDB method.

• Proceedings of the Materials Research Society of Korea Conference
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• 2003.03a
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• pp.34-34
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• 2003

Piezoelectric or magnetostrictive materials, known as smart materials, have been researched widely for sensors or actuators in micro system technology. In our research, thick sol-gel lead zirconate titanate(Pb(Zr$\sub$1-x/Ti$\sub$x/)O$_3$) films were fabricated and their characteristics were investigated f3r angular rate sensor applications. The thickness of the PZT films is 1.5${\mu}$m, which is required by a vibration angular rate sensor for a good actuation and sensing. The remnant polarization of the PZT flms is 12.0 ${\mu}$C/$\textrm{cm}^2$. The electromechanical constants of PZT thin film showed the value of susceptance(B) of 4800${\mu}$ s at capacitance of 790pF. The PZT films were applied to the vibration angular rate sensor structure and the vibration of 1.78 ${\mu}$m in amplitude at the resonant frequency of 35.8㎑ was obtained by driving voltage of 5V$\sub$p-p/ of bulk piezoelectric materials with out of phase signal through voltage and inverting amplifier.

• Journal of the Korean Ceramic Society
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• v.38 no.7
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• pp.639-642
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• 2001

전형적인 비저항-온도 특성을 갖는 BaTiO$_3$계 PTC 세라믹을 일반적인 세라믹 공정을 이용하여 제조하였고, 결정립계면에 형성된 전위장벽의 높이를 구하였다. ZnO 바리스터의 전위장벽을 구하기 위해 이용되었던 커패시턴스-전압 관계식과는 다른 새로운 관계식을 제안하였고, 기존의 비저항-온도 관계식을 다소 변경한 관계식을 이용하여 전위장벽을 구하였다. 두 관계식으로부터 구한 전위장벽의 높이는 매우 유사한 값을 보이고 있으며 타 연구자들에 의해 보고된 값과도 잘 일치하고 있다. 비저항-온도 관계식과 커패시턴스-전압 관계식을 이용하여 130-18$0^{\circ}C$ 구간에서 구한 전위장벽의 크기는 각각 0.41-0.76V와 0.36-0.80V이었다.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.26 no.10
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• pp.741-744
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• 2013

In this study, we fabricated anodic aluminum oxide (AAO) membrane by two step anodizing process for pH detection. The structural properties were observed by X-ray diffraction (XRD) and field emission scanning electron microscope (FE-SEM). Electrochemical measurements of the pH sensor have been performed in capacitance-voltage (C-V) and drift rates. The characterization of AAO membrane exhibited high sensitivity (99.1 mV/pH) at second anodizing time of 4 min.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.37 no.1
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• pp.101-105
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• 2024

4H-SiC power metal-oxide-semiconductor field effect transistors (MOSFETs) have been developed to achieve lower specific-on-resistance (R_on,sp), and the gate oxides have been thermally grown. The poor channel mobility resulting from the high interface trap density (D_it) at the SiO₂/4H-SiC interface significantly affects the higher switching loss of the power device. Therefore, the development of novel fabrication processes to enhance the quality of the SiO₂/4H-SiC interface is required. In this paper, NO post-oxidation annealing (POA) by using the conditions of N₂ diluted NO at a high temperature (1,300℃) is proposed to reduce the high interface trap density resulting from thermal oxidation. The NO POA is carried out in various NO ambient (0, 10, 50, and 100% NO mixed with 100, 90, 50, and 0% of high purity N₂ gas to achieve the optimized condition while maintaining a high temperature (1,300℃). To confirm the optimized condition of the NO POA, measuring capacitance-voltage (C-V) and current-voltage (I-V), and time-of-flight secondary-ion mass spectrometry (ToF-SIMS) are employed. It is confirmed that the POA condition of 50% NO at 1,300℃ facilitates the equilibrium state of both the oxidation and nitridation at the SiO₂/4H-SiC interface, thereby reducing the D_it.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.15 no.6
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• pp.1349-1354
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• 2011

In this work, we fabricated the CdZnS/CdTe heterojunction and investigated the C-V characteristics to determine the depletion width and the charge density distribution. A parallel experiment on CdS/CdTe heterojunction was also carried out for comparison. The depletion region width, for CdZnS/CdTe heterojunction, was nearly constant, regardless of bias voltage. However, the depletion region was wider than that of CdS/CdTe heterojunction due to high resistivity of CdZnS film. The interface charge density of CdZnS/CdTe heterojunction was increased linearly with the bias voltage and showed lower values than those for CdS/CdTe junction. The open circuit voltage of CdZnS/CdTe heterojunction solar cells increased with zinc mole ratio due to reducing of the electron affinity difference between CdZnS and CdTe films. However, the increase of series resistance due to the high resistivity of Cd1-xZnxS films results in reducing conversion efficiency.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.05c
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• pp.47-52
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• 2002

A processing method is developed for preparing sol-gel derived $Pb(Zr_{1-x}Ti_x)O_3$ (x=0.5) thin films on Pt-Ir($Pt_{80}Ir_{20}$)-alloy substrates. The as-deposited layer was dried on a plate in air at $70^{\circ}C$. And then it was baked at $1500^{\circ}C$, annealed at $450^{\circ}C$ and finally annealed for crystallization at various temperatures ranging from $580^{\circ}C$ to $700^{\circ}C$ for 1hour in a tube furnace. The thickness of the annealed film with three layers was $0.3{\mu}m$. Crystalline properties and surface morphology were examined using X-ray diffractometer (XRD). Electrical properties of the films such as dielectric constant, C-V, leakage current density were measured under different annealing temperature. The PZT thin film which was crystallized at $600^{\circ}C$ for 60minutes showed the best structural and electrical dielectric constant is 577. C-V measurement show that $700^{\circ}C$ sample has window memory volt of 2.5V and good capacitance for bias volts. Leakage current density of every sample show $10^{-8}A/cm^2$ r below and breakdown voltage(Vb) is that 25volts.

• Korean Journal of Materials Research
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• v.18 no.4
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• pp.169-174
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• 2008

The structural and electrical properties of amorphous $BaSm_2Ti_4O_{12}$ (BSmT) films on a $TiN/SiO_2/Si$ substrate deposited using a RF magnetron sputtering method were investigated. The deposition of BSmT films was carried out at $300^{\circ}C$ in a mixed oxygen and argon ($O_2$ : Ar = 1 : 4) atmosphere with a total pressure of 8.0 mTorr. In particular, a 45 nm-thick amorphous BSmT film exhibited a high capacitance density and low dissipation factor of $7.60\;fF/{\mu}m2$ and 1.3%, respectively, with a dielectric constant of 38 at 100 kHz. Its capacitance showed very little change, even in GHz ranges from 1.0 GHz to 6.0 GHz. The quality factor of the BSmT film was as high as 67 at 6 GHz. The leakage current density of the BSmT film was also very low, at approximately $5.11\;nA/cm^2$ at 2 V; its conduction mechanism was explained by the the Poole-Frenkel emission. The quadratic voltage coefficient of capacitance of the BSmT film was approximately $698\;ppm/V^2$, which is higher than the required value (<$100\;ppm/V^2$) for RF application. This could be reduced by improving the process condition. The temperature coefficient of capacitance of the film was low at nearly $296\;ppm/^{\circ}C$ at 100 kHz. Therefore, amorphous BSmT grown on a TiN substrate is a viable candidate material for a metal-insulator-metal capacitor.