• The Transactions of The Korean Institute of Electrical Engineers
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• v.59 no.2
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• pp.242-247
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• 2010

This paper introduces a real-time load flow program for Korean energy management system(EMS). This study is concentrated on the following aspects. First, we propose the model of the real-time database and power system equipment for the real-time load flow. These models are extracted from the needs of load flow functions and are designed to the application common information. Second, several techniques are applied for the efficient convergence and computational speed. The generation/load mismatch is redistributed using generator participation factors which are separated to the reference bus. For the voltage control, the jacobian matrix is composed with the basic Y matrix elements and the voltage control elements. Through the optimally ordering, jacobian row and column for a column is changed. However all jacobian matrix entries have same order with the Y matrix. The proposed program is tested using the Korea Electric Power Corporation(KEPCO) system. Through the test, we verified that the proposed program can be effectively used to accomplish the Korean EMS system.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.2 s.332
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• pp.65-72
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• 2005

We can integrate more IP blocks on a silicon die as the development of fabrication technologies and EDA tools. Consequently, we can design complicated SoC architecture including multi-processors. However, most of existing SoC buses have bottleneck in on-chip communication because of shared bus architectures, which result in the performance degradation of systems. In most cases, the performance of a multi-processor system is determined by efficient on-chip communication and the well-balanced distribution of computation rather than the performance of the processors. We propose an efficient SoC Network Architecture(SNA) using crossbar routers which provide a solution to ensure enough communication bandwidth. The SNA can significantly reduce the bottleneck of on-chip communication by providing multi-channels for multi-masters. According to the proposed architecture, we design a model system for the SNA. The proposed architecture has a better efficiency by $40\%$ than the AMBA AHB according to a simulation result.

• Journal of Energy Engineering
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• v.5 no.1
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• pp.72-79
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• 1996

The effect of controllers-Exciter, Power System Stabilizer, and Static Var Compensator-in one machine infinite bus system is investigated in this paper. The structure of generator state matrix with controllers is represented, while the Static Var Compensator is installed in generator terminal bus. Eigen-value analysis is performed and the effects of controllers to the dominant eigenvalue in one machine infinite bus system are represented by first order eigenvalue sensitivity coefficients while the operating conditions of the system are varied. Optimization of controller parameters using first order eigenvalue sensitivity coefficients is performed by the Simplex Method. It is proved that exciter control is the most efficient method to improve stability of the system and the effect of Static Var Compensator is small, in the case of one machine infinite bus system.

• Proceedings of the KIEE Conference
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• 2000.07a
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• pp.274-275
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• 2000

This paper introduces new ordering algorithms using the graph of data structure and forward/backward substitution of LU decomposition using recursive function. The performance of the algorithm is compared with Tinney's algorithm using 14 bus systems. Test results show that the new fill-in element of Jacobian matrix using the proposed ordering algorithm is same as that of Tinner scheme 3 and the forward/backward substitution can reduce the computation time

• The Transactions of the Korean Institute of Electrical Engineers
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• v.37 no.2
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• pp.73-79
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• 1988

A fault current in Simultaneous faults is calulated, which satisfies the reliability for expansion of power scale. New algorithm for analyzing fault current is developed, which calculates exactly thevnin equivalent impedance from fault point by cecomposing increment bus admittance matrix ( Ybus), and fault current is calculated by applying multiport theory. The signeficant results are as follows ` 1) When system fault changes system configulation, equivalent impedance can be calculated simply with this new algorithm. 2) Mutual coupling of transmission line can be calculated efficiently. 3) Simultaneous fault current is analyzed by applying multiport theory, which can be applicable to large scale systems.

• Proceedings of the Korean Information Science Society Conference
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• 2004.10a
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• pp.553-555
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• 2004

SoC 분야에서 온 칩 버스는 전체 시스템의 성능을 결정하는 중요한 요소이다. 이에 따라 최근 ARM 사에서는 고성능 온 칩 버스 구조인 ML(Multi-Layer) AHB 버스를 제안하였다. ML AHB 버스는 저전력 임베디드 시스템에 적합한 버스 구조로써 현재 널리 사용되고 있다. 하지만, 고가이기 때문에 ADK(AMBA$^{TM}$ Design kit) 구매에 대한 부담이 적지 않다. 본 논문은 ML AHB의 버스 구조인 버스 매트릭스 구현 및 ADK에서 제공되지 않는 테스트 환경 즉, Protocol Checker 및 Performance Monitor Module 구현에 관한 것이다.

• Proceedings of the KAIS Fall Conference
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• 2007.11a
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• pp.159-161
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• 2007

본 논문에서는 버스에 장착되는 LED 번호판의 효율적인 설계에 관한 연구를 보여준다. LED 번호판은 16X16 LED Dot Matrix(LDM)을 사용하여 버스 구간을 번호로 표시하기 위한 것으로 기존의 플라스틱 판을 LDM을 사용하여 표시한 것이다. 본 논문에서는 LDM을 사용하여 효율적인 번호판 설계를 보여주고, 실제 시작품을 버스에 장착하여 그의 타당성을 확인하였다.

• Journal of Electrical Engineering and Technology
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• v.1 no.2
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• pp.170-176
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• 2006

This paper proposes a topological locating algorithm to determine the location of the power quality event source. This algorithm makes use of the information on the topology of the monitored network and on the direction of PQ events. As a result, the bus incidence matrix is modified using monitor location and the direction matrix is constructed. With this information, the algorithm determines the suspected locations of the PQ events. To reduce suspicious areas, it utilizes event cause and related equipment. In case of line fault event, it calculates the distance from the monitor to the location of event source. The overall algorithm is applied to the IEEE test feeder and accurately identifies the event source location.

• The Transactions of the Korean Institute of Electrical Engineers A
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• v.52 no.5
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• pp.241-249
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• 2003

This paper describes a novel approach for performing eigenvalue analysis and frequency domain analysis of multi-machine power system. The salient feature of this approach is a direct approach for constructing the state matrix equations of linearized power systems about its operating point using modular technique. These state matrix equations are then used to obtain eigenvalues and mode shapes of the system, and frequency response, or Bode, plots of selected transfer functions. The proposed program provides a flexible tool for systematic analyses of tuning PSS's parameters. The paper also presents its application to the analyses of a single-machine infinite bus system and two-area system with 4 machines.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.57 no.10
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• pp.1708-1712
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• 2008

This paper describes a linear matrix inequality (LMI) approach to the design of robust low-order power system stabilizers (PSSs), which are used to damp out local-mode oscillations of synchronous generators. The performance of a PSS is expressed as the location of the closed-loop poles, and a single fixed-gain pole-placement controller is synthesized for a wide range of operating conditions. The synthesis results in simultaneous regional pole-placement stabilization. and is formulated as an LMI feasibility problem with a rank condition. A penalty method is applied to solve the rank-constrained LMI problem. Numerical experiments with a single-machine connected to an infinite bus system were performed to demonstrate the proposed method.