• Journal of the Korean Institute of Telematics and Electronics B
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• v.32B no.11
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• pp.1374-1382
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• 1995

In TFT-LCDs, as the display size area becomes larger, and the resolution higher, we have to consider the image degradation effects due to the incorporation of the TFT-LCD parameters such as the data-line resistance, the common electrode resistance, the data-line to common parasitic capacitance, and the output characteristics of driver ICs. One of the degradation effects is crosstalk resulting from the coupling between the source bus-line and common electrode. Since a source signal which represents a large number of display data is supposed to vary frequently, the common signal level is affected through the coupling effect, resulting in the degradation of nearby pixel drive signals. Therefore, we proposed a method to compensate for this source-common electrode coupling effect, we also designed and experimented the feasibility of our crosstalk compensation circuit in the actual TFT-LCD. We saw that the newly designed compensation circuit greatly reduced the crosstalk in display pattern image.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2000.07a
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• pp.284-287
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• 2000

We analyzed the 3-dimensional discharge characteristic in plasma display panel(PDP) cell using the 3-dimensional emission distribution of 828nm light measured by scanned point detecting method(SPDM). The emitted light distributions on the ITO electrode show the stronger light intensity near to the electrode gap than outside. Also, 828nm light is widely detected outside of the bus electrode. We consider that measurement using new SPDM is effective to analyze the discharge physics and propose the new panel structures.

• Journal of Information Display
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• v.10 no.3
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• pp.111-116
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• 2009

In this paper, a plasma-assisted patterning method for the organic layers of organic light-emitting diodes (OLEDs) and its effect on the OLED performances are reported. Oxygen plasma was used to etch the organic layers, using the top electrode consisting of lithium fluoride and aluminum as an etching mask. Although the current flow at low voltages increased for the etched OLEDs, there was no significant degradation of the OLED efficiency and lifetime in comparison with the conventional OLEDs. Therefore, this method can be used to reduce the ohmic voltage drop along the common top electrodes by connecting the top electrode with highly conductive bus lines after the common organic layers on the bus lines are etched by plasma. To further analyze the current increase at low voltages, the plasma patterning effect on the OLED performance was investigated by changing the device sizes, especially in one direction, and by changing the etching depth in the vertical direction of the device. It was found that the current flow increase at low voltages was not proportional to the device sizes, indicating that the current flow increase does not come from the leakage current along the etched sides. In the etching depth experiment, the current flow at low voltages did not increase when the etching process was stopped in the middle of the hole transport layer. This means that the current flow increase at low voltages is closely related to the modification of the hole injection layer, and thus, to the modification of the interface between the hole injection layer and the bottom electrode.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.17 no.4
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• pp.426-431
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• 2004

We have studied the pressure-dependent liquid crystal's dynamics in a twisted nematic (TN) liquid crystal panel with thin film transistor by applying an external pressure to it. When the external pressure is applied to the panel in a dark state, the disclination lines were generated as a light leakage whereas they did not appear in a simple test cell that has only pixel and common electrodes. It was because the disclination lines were Provoked by the electric field between pixel electrode and data/gate bus line for active matrix driving. Consequently, the external pressure resulted in dynamic instability of the liquid crystal so that the disclination lines at the data/gate bus line intruded into the active area.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2000.07a
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• pp.577-580
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• 2000

We measured 3-dimensional images of the light emitted from plasma display panel(PDP) by using newly proposed scanned point detecting method(SPDM). The SPDM has the point detector with pinhole. The light emitted from PDP cell at the in-focus position can pass through the pinhole and be collected by detector. On the contrary, the light emitted from PDP cell at the out-of-focus positions is focused on the front of or the behind of the pinhole. We could analyze the characteristic of 3-dimensional light emission distribution by SPDM. From 3-dimensional measurement of 828nm, we found that the efficient design of PDP cell, the importance of opening ratio, and the relations between BUS electrode position and discharge intensity are obtained.

• 한국정보디스플레이학회:학술대회논문집
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• 2003.07a
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• pp.381-384
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• 2003

Photosensitive electordes(Ag and Black) are widely used in the patterning of both address and bus electrodes on the rear and front panel of plasma display panel (PDP). As the need for high resolution(>XGA) and large area(>60 inches) PDP is increased, basic understanding of each component of formulation on the photolithographic process of patterning electrodes are required in order to increase the yield in the production of PDP. In this work, the materials and amount of necessary components of photosensitive electrode paste and their effect on the photolithographic process of patterning electrodes were studied.

• Proceedings of the KIEE Conference
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• 2008.07a
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• pp.1309-1310
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• 2008

최근 대형 FPD로 주목받고 있는 PDP는 높은 방전개시전압과 투명전극인 ITO를 사용함으로서 가격이 상승하는 문제점이 있다. 그래서 본 논문에서는 ITO전극 대신 금속(Ag) BUS전극을 사용해 저가격화를 이룰 수 있는 Fence전극구조에 Floating전극을 도입함으로서 방전개시전압을 낮추고 효율을 개선할 수 있는 새로운 Fence전극구조를 제안하였다. 실험은 reference와 제안된 구조로 구성되어 있는 4-inch AC PDP에 Test Panel을 직접 제작하여 firing voltage, discharge current, luminanace, luminous efficiency를 측정하여 비교하였다. 제안된 구조는 방전개시전압이 최대 20V감소하고 방전전류가 최대 17%감소하였고 효율면에서도 최대 13%의 상승을 보였다.

• 한국정보디스플레이학회:학술대회논문집
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• 2006.08a
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• pp.882-885
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• 2006

The contact resistivity of the black interlayer which has been introduced between BUS and ITO electrodes in a plasma display panel was evaluated using two kinds of specially designed test electrode patterns. Of the two, type 2 pattern was able to evaluate the contact resistivity more successfully, which was calculated as about $250{\Omega}$ in the suggested test pattern structure.

• Journal of the Korean Society for Heat Treatment
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• v.19 no.4
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• pp.219-224
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• 2006

Silver paste with low sintered temperature has been developed in order to apply electronic parts, such as bus electrode, address electrode in PDP (Plasma Display Panel) with large screen area. In this study, nano-sized silver particles with 10-30 nm were synthesized from silver nitrate ($AgNO_3$) solution by chemical reduction method and silver paste with low sintered temperature was prepared by mixing silver nanoparticles, conventional silver powder with the particle size 1.6 um and Pb-free frit. Conductive thick film from silver paste was fabricated by screen printing on alumina substrate. After firing at $540^{\circ}C$, the cross section and surface morphology of the thick films were analyzed by FE-SEM. Also, the sheet resistivity of the fired thick films was measured using the four-point technique.

• Proceedings of the IEEK Conference
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• 2001.06b
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• pp.49-52
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• 2001

The electrochemical characteristics of Alalloy thin film with low impurity concentrations AIZr deposited by using do magnetron co-sputtering deposition are investigated for the applications as gate bus line in the TFT-LCD panel. AlZr thin films were deposited various atomic percent of Zr. For increasing Zr atomic percent the hillock density was decreased and the resistivity was increased. The deposited thin films show the decrease of resistivity and the increase of grain size after the RTA at 300 $^{\circ}C$for 20 min.. Moreover, the resistivity of AIZr does not show appreciable grain size dependence after RTA. It is concluded that the decrease of resistivity after RTA is due to the increase of grain size. The annealed AIZr(at.0.9%) is found to be hillock free. The electrode potentials of AIZr were less than ITO's (-1.4V) and the etching rate of AIZr(at.0.9%) was 3.8587ng/sec. in KOH(10%) solution. Caculation results reveal that the AIZr(at.0.9%) thin film can be applicable to gate line of 25" UXGA class TFT-LCD panels and can not be applicable to data line.line.