• Journal of the Semiconductor & Display Technology
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• v.13 no.2
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• pp.1-5
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• 2014

Transparent and conducting aluminum-doped ZnO electrodes were fabricated by atomic layer deposition methods. The electrode showed the lowest resistivity of $5.73{\times}10^{-4}{\Omega}cm$ at a 2.5% cyclic layer deposition ratio of Trimethyl-aluminum and Diethyl-zinc chemicals. The electrodes showed minimum resistivity when deposited at a temperature of $225^{\circ}C$. The electrode also showed optical transmittance of about 92% at 300 nm. An organic solar cell made with a 300-nm-thick aluminum-doped ZnO electrode exhibited 2.0% power conversion efficiency.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.51 no.6
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• pp.271-277
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• 2002

In this paper, a MEMS silicon package is newly designed, fabricated for HMIC, and characterized for microwave and millimeter-wave device applications. The proposed package is fabricated by using two high resistivity silicon substrates and surface/bulk micromachining technology. It has a good performance characteristic such as -20㏈ of $S_11$/ and -0.3㏈ of $S_21$ up to 20㎓, which is useful in microwave region. It has also better heat transfer characteristics than the commonly used ceramic package. Since the proposed silicon MEMS package is easy to fabricate and wafer level chip scale packaging is also possible, the production cost can be much lower than the ceramic package. Since it will be a promising low-cost package for mobile/wireless applications.

• Journal of Sensor Science and Technology
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• v.1 no.1
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• pp.67-75
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• 1992

PTC thermistor has been fabricated with as-received $BaTiO_{3}$ powder and its electrical properties were investigated. The resistivity of the PTC thermistor was measured at $20^{\circ}C$ intervals from $20^{\circ}C$ to $200^{\circ}C$. The electrical characteristics of the PTC thermistor are determined by the ac complex impedance analysis. The average grain size measured with a scanning electron microscope increased from $3.8{\mu}m$ to $8.8{\mu}m$ with increasing sintering temperature between $1280^{\circ}C$ and $1400^{\circ}C$. The maximum resistivity jump was $4{\times}10^{5}$. The bulk resistivity of the thermistor sintered above $1340^{\circ}C$ decreased with increasing temperature of the measurement. The grain boundary resistance increased exponentially, the grain boundary capacitance decreased, and the built-in potential at the grain boundary increased with increasing temperature of the measurement. The charge densiy at the grain boundary increased with increasing temperature up to $110^{\circ}C$, which leveled off with further increase in measuring temperature.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.41 no.9
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• pp.1013-1020
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• 1992

The conductivity variation of a high resistivity bulk silicon semiconductor, whose electrodes were deposited with aluminum vapor, was studied experimentally by measuring the X-ray intensity and current flow, which was developed by X-ray radiation while applying a pulse voltage to the silicon, in a load resistor connected to the semiconductor. The current flow observed immediately as the X-ray radiated, and when the X-ray decreased. It was found from the observation of switching current for the X-ray intensity and the voltage applied in the semiconductor that the switching current of the semiconductor increased as the intensity of the X-ray and the applied voltage increased. In case of lower applied voltage, the switching current for higher applied voltage depended on the intensity of the X-ray radiated due to the saturation of electron and hole.

• 한국정보디스플레이학회:학술대회논문집
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• 2008.10a
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• pp.855-858
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• 2008

Transient current (TC) on bulk-state liquid crystal mixtures was measured. We found that TC is very sensitive to impurities and the features of TC curves depend on the type of contamination, from which the quality of materials can be definitely evaluated and the type of impurities can also be revealed.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.52 no.10
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• pp.451-457
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• 2003

The silicon wafer is stable status at room temperature, but it is weak at high temperatures which is necessary for it to be fabricated into a power semiconductor device. During thermal diffusion processing, a high temperature produces a variety thermal stress to the wafer, resulting in device failure mode which can cause unwanted oxide charge or some defect. This disrupts the silicon crystal structure and permanently degrades the electrical and physical characteristics of the wafer. In this paper, the electrical characteristics of a single oxide layer due to high temperature diffusion process, wafer resistivity and thickness of polyback was researched. The oxide quality was examined through capacitance-voltage characteristics, defect density and BMD(Bulk Micro Defect) density. It will describe the capacitance-voltage characteristics of the single oxide layer by semiconductor process and device simulation.

• Geophysics and Geophysical Exploration
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• v.7 no.1
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• pp.33-40
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• 2004

Numerical and laboratory studies have been conducted to test the ability of Electrical Resistance Tomography-a technique used to map the electrical resistivity of the subsurface-to delineate contaminant plumes. Two-dimensional numerical models were created to investigate survey design and resolution. Optimal survey design consisted of both downhole and surface electrode sites. Resolution models revealed that while the bulk fluid flow could be outlined, small-scale fingering effects could not be delineated. Laboratory experiments were conducted in a narrow glass tank to validate theoretical models. A visual comparison of fluid flow with ERT images also showed that, while the bulk fluid flow could be seen in most instances, fine-scale effects were indeterminate.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1993.05a
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• pp.96-99
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• 1993

Electrical properties of the Thin Film Transistor(TFT) electrode metal films were investigated through the Test Elements Group(TEG) experiment. The main purpose of this investigation was to characterize the electrical resistance properties of patterned metal films with respect to the variations of film thickness and TEG metal line width. Aluminum(Al), Tantalum(Ta) and Chromium(Cr) that are currently used as TFT electrode films were selected as the probed metal films. To date, no work in the electrical characterizations of patterned electrodes of a-Si TFT was accomplished. Bulk resistance$(R_b)$, sheet resistance$(R_s)$, and resistivities($\rho$) of TEG patterned metal lines were obtained. Electrical continuity test of metal film lines was also performed in order to investigate the stability of metallization process. Almost uniform-linear variations of the electrical properties with respect to the metal line displacements was also observed.

• The Journal of Engineering Geology
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• v.7 no.2
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• pp.113-126
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• 1997

Electrical resistivity methods of dipole - dipole array profiling and Schiumberger array sounding were tested on a segment of the Woraksan granitic batholith for the research into the imaging of irregular attitudes of fracture zones in the crystaaline rock in terms of processing and interpretation schemes. By the dipole - dipole array method, inhomogeneities such as small scale of fracture zones were properly delineated down at some depth even within hard rock environment. Fracture zones were interpreted to be at the boundaries between the high amplitude zone and very low amplitude zone in the resistivity plot and they were also successfully outlined in two - dimensional layer and pseudo - three - dimensional volume constructed by the incorporation of vertical sounding data. The surface location of the fracture zones was correlated by the zero - crossing point in the VLF(very low frequency) electromagnetic data. Pseudo - three - dimensional attitudes of fracture zones were efficiently illuminated by optimum projection angle. The mean of bulk resistivity for the Woraksan granite and the near fracture zones is estimated to be approximately of 4,000 ohm - m which is much higher than the value of 700 ohm - m for the Rwachunri limesilicate environment. This difference is due to both the rock type, i.e., biotite granite vs limesilicate, and the occurrence of secondary openings of fold and fault associated with the intrusion of granite. In this study statistical analyses on the resistivity color plot were performed in terms of three representative statistical moments, i.e., standard deviation, skewness, and kurtosis. The fracture zones in the standard deviation plot were characterized by the higher value, compared to the value of homogeneous portion. The upper boundary of the high resistivity zone was also successfully delineated in the skewness and kurtosis plots.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.02a
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• pp.288-289
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• 2011

Indium Tin Oxide (ITO) is a typical highly Transparent Conductive Oxide (TCO) currently used as a transparent electrode material. Most widely used deposition method is the sputtering process for ITO film deposition because it has a high deposition rate, allows accurate control of the film thickness and easy deposition process and high electrical/optical properties. However, to apply high quality ITO thin film in a flexible microelectronic device using a plastic substrate, conventional DC magnetron sputtering (DMS) processed ITO thin film is not suitable because it needs a high temperature thermal annealing process to obtain high optical transmittance and low resistivity, while the generally plastic substrates has low glass transition temperatures. In the room temperature sputtering process, the electrical property degradation of ITO thin film is caused by negative oxygen ions effect. This high energy negative oxygen ions(about over 100eV) can be critical physical bombardment damages against the formation of the ITO thin film, and this damage does not recover in the room temperature process that does not offer thermal annealing. Hence new ITO deposition process that can provide the high electrical/optical properties of the ITO film at room temperature is needed. To solve these limitations we develop the Magnetic Field Shielded Sputtering (MFSS) system. The MFSS is based on DMS and it has the plasma limiter, which compose the permanent magnet array (Fig.1). During the ITO thin film deposition in the MFSS process, the electrons in the plasma are trapped by the magnetic field at the plasma limiters. The plasma limiter, which has a negative potential in the MFSS process, prevents to the damage by negative oxygen ions bombardment, and increases the heat(-) up effect by the Ar ions in the bulk plasma. Fig. 2. shows the electrical properties of the MFSS ITO thin film and DMS ITO thin film at room temperature. With the increase of the sputtering pressure, the resistivity of DMS ITO increases. On the other hand, the resistivity of the MFSS ITO slightly increases and becomes lower than that of the DMS ITO at all sputtering pressures. The lowest resistivity of the DMS ITO is $1.0{\times}10-3{\Omega}{\cdot}cm$ and that of the MFSS ITO is $4.5{\times}10-4{\Omega}{\cdot}cm$. This resistivity difference is caused by the carrier mobility. The carrier mobility of the MFSS ITO is 40 $cm^2/V{\cdot}s$, which is significantly higher than that of the DMS ITO (10 $cm^2/V{\cdot}s$). The low resistivity and high carrier mobility of the MFSS ITO are due to the magnetic field shielded effect. In addition, although not shown in this paper, the roughness of the MFSS ITO thin film is lower than that of the DMS ITO thin film, and TEM, XRD and XPS analysis of the MFSS ITO show the nano-crystalline structure. As a result, the MFSS process can effectively prevent to the high energy negative oxygen ions bombardment and supply activation energies by accelerating Ar ions in the plasma; therefore, high quality ITO can be deposited at room temperature.