• Proceedings of the KIPE Conference
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• 2016.07a
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• pp.363-364
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• 2016

In this paper, a novel bridgeless interleaved power factor correction circuit with single current sensor is proposed. The proposed control strategy requires only one current sensor for the interleaved bridgeless PFC. By sampling the output current, all the boost indictor currents can be calculated and used to control the input current according to the input voltage. The reduced number of current sensors and associated feedback circuits helps reduce the cost of system. The problem caused by the unequal current gain between current sensors inherently does not exist in the proposed topology. Thus, current sharing between converters can be achieved more accurately and the high frequency distortion is decreased. In addition, the proposed technique can be applied to the other kinds of interleaved PFC topologies. Performance of the proposed control strategy is verified by the experimental results with 6.6kW bridgeless interleaved PFC circuit.

• Journal of Power Electronics
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• v.14 no.5
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• pp.815-826
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• 2014

An improved bridgeless interleaved boost power factor correction (PFC) rectifier to improve power efficiency and component utilization is proposed in this study. With combined conventional bridgeless PFC circuit and interleaved technology, the proposed rectifier consists of two interleaved and magnetic inter-coupling boost bridgeless converter cells. Each cell operates alternatively in the critical conduction mode, which can achieve the soft-switching characteristics of the switches and increase power capacity. Auxiliary blocking diodes are employed to eliminate undesired circulating loops and reduce current-sensing noise, which are among the serious drawbacks of a dual-boost PFC rectifier. Magnetic component utilization is improved by symmetrically coupling two inductors on a unique core, which can achieve independence from each other based on the auxiliary diodes. Through the interleaved approach, each switch can operate in the whole line cycle. A simple control scheme is employed in the circuit by using a conventional interleaved controller. The operation principle and theoretical analysis of the converter are presented. A 600 W experimental prototype is built to verify the theoretical analysis and feasibility of the proposed rectifier. System efficiency reaches 97.3% with low total harmonic distortion at full load.

• Proceedings of the KIPE Conference
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• 2017.07a
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• pp.24-25
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• 2017

In this paper, a low cost bridgeless interleaved power factor correction topology for electric vehicle charger application is proposed. With the proposed topology the number of switches, inductors, current sensors and associated circuits can be reduced, thereby reducing the cost of the system as compared to the conventional bridgeless PFC circuit. The reduced input current ripple by the proposed interleaved topology makes it suitable for high power applications such as electric vehicle chargers since it can reduce the size of the inductor core and the Electro Magnetic Interference (EMI) problem. In the proposed topology only one current sensor is required. All the boost inductor currents can be reconstructed by sampling the output current and used to control the input current. Therefore the typical problem caused by the unequal current gain of each current sensor inherently does not exist in the proposed topology. In addition the current sharing between converters can be achieved more accurately and the high frequency distortion is decreased. The performance of the proposed converter is verified by the experimental results with a prototype of 6.6kW bridgeless interleaved PFC circuit.

• Journal of Electrical Engineering and Technology
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• v.12 no.3
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• pp.1156-1165
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• 2017

A high performance interleaved bridgeless boost power factor correction (PFC) rectifier operating under the critical current conduction mode (CrM) is proposed in this paper to improve the efficiency and system performance of various applications, such as nano-grid systems. By combining the interleaved technique with the bridgeless topology, the circuit contains two independent branches without rectifier diodes. The branches operate in interleaved mode for each respective half-line period. Moreover, when operating in CrM, all the power switches take on soft-switching, thereby reducing switching losses and raising system efficiency. In addition, the input current flows through a minimum amount of power devices. By employing a commercial PFC controller, an effective control scheme is used for the proposed circuit. The operating principle of the proposed circuit is presented, and the design considerations are also demonstrated. Simulations and experiments have been carried out to evaluate theoretical analysis and feasibility of the proposed circuit.

• Proceedings of the KIPE Conference
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• 2012.11a
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• pp.151-152
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• 2012

본 논문은 전기자동차의 탑재형 충전기 (OBC, On-Board Charger)에 적용 가능한 고효율 역률개선회로 (PFC, Power Factor Correction Circuit)들의 손실을 분석한다. 평균전류모드제어를 이용하여 conventional boost PFC, interleaved boost PFC, semi-bridgeless PFC, totem pole PFC, seudo totem pole PFC, back-to-back bridgeless PFC, interleaved bridgeless PFC 등 7개의 토폴로지를 3.3kW OBC 기반으로 설계하고, 각 토폴로지의 손실을 수식과 PSIM의 thermal module을 이용하여 분석한다. 분석한 결과를 토대로 제시한 토폴로지들의 효율 및 성능을 비교한다.

• The Transactions of the Korean Institute of Power Electronics
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• v.20 no.3
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• pp.214-222
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• 2015

The superiority of gallium nitride FET (GaN FET) over silicon MOSFET is examined in this paper. One of the outstanding features of GaN FET is low reverse-recovery charge, which enables continuous conduction mode operation of totem-pole bridgeless boost power factor correction (PFC) circuit. Among many bridgeless topologies, totem-pole bridgeless shows high efficiency and low conducted electromagnetic interference performance, with low cost and simple control scheme. The operation principle, control scheme, and circuit implementation of the proposed topology are provided. The converter is driven in two-module interleaved topology to operate at a power level of 5.5 kW, whereas phase-shedding control is adopted for light load efficiency improvement. Negative bias circuit is used in gate drivers to avoid the shoot-through induced by high speed switching. The superiority of GaN FET is verified by constructing a 5.5 kW prototype of two-module interleaved totem-pole bridgeless boost PFC converter. The experiment results show the highest efficiency of 98.7% at 1.6 kW load and an efficiency of 97.7% at the rated load.

• Proceedings of the KIPE Conference
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• 2011.07a
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• pp.555-556
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• 2011

본 논문은 중, 고용량 통신용 정류기에 적합한 고효율 PFC Topology를 선정하여 특성 및 성능을 비교한다. 선정회로는 Conventional Average Current Mode PFC, Back-To-Back Bridgeless PFC, Semi-Bridgeless PFC, Interleaved PFC 이다. 통신용 1U 표준사이즈의 2kw PFC 정류기 제작 및 시험을 통해 각 Topology의 성능 차이점을 확인한다.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.65 no.12
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• pp.2000-2007
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• 2016

Generally, in order to implement the CRM(Critical Conduction Mode), the analog controller is used rather than a digital controller because the control is simple and uses less power. However, according to the semiconductor technology development and various user needs, digital control system based on a DSP is on the rise. Therefore, in this paper, the CRM bridgeless PFC converter based on a digital control is proposed. It is necessary to detect the inductor current when it reaches zero and peak value, for calculating the on time and off time by using the current information. However, in this paper, the on-time and off-time are calculated by using the proposed algorithm without any current information. If the switching-times are calculated through the steady-state analysis of the converter, they do not reflect transient status such as starting-up. Therefore, the calculated frequency is out of range, and the transient current is generated. In order to solve these problems, limitation method of the on-time and off-time is used, and the limitation values are varied according to the voltage reference. In addition, in steady state, depending on the switching frequency, the inductance is varied because of the resonance between the inductor and the parasitic capacitance of the switching elements. In order to solve the problem, inductance are measured depending on the switching frequency. The measured inductance are used to calculate the switching time for preventing the transient current. Simulation and experimental results are presented to verify the proposed method.

• Proceedings of the KIPE Conference
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• 2017.07a
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• pp.78-79
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• 2017

본 논문에서는 스위칭 손실을 저감한 고주파 인터리브드 토템폴 브리지리스 부스트 PFC 컨버터를 제안한다. 인터리브드 토템폴 브리지리스 부스트 PFC 컨버터는 하드 스위칭 동작을 하기 때문에 큰 스위칭 손실을 가지며, 고주파에서의 동작이 제한된다. 제안하는 컨버터는 수동 소자인 인덕터가 추가된 구조이며, 추가 인덕터의 에너지를 이용해 영전압 스위칭을 할 수 있다. 그 결과, 스위칭 손실이 저감되고 고주파 동작이 가능해진다. 또한 기존에 설계된 회로와 제어단을 그대로 유지할 수 있다.

• Proceedings of the KIPE Conference
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• 2012.07a
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• pp.377-378
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• 2012

DC-DC 컨버터를 인터리브 방식으로 제어하면 출력 전류 리플이 저감되고, 출력 필터 커패시터의 용량을 줄일 수 있다. 하지만 공진(Resonance)을 통해 전력을 전달하는 LLC 공진형 컨버터의 경우 회로를 구성하는 공진 인덕터 및 공진 커패시터의 오차(Tolerance)로 인해 출력 전류 리플의 언밸런스가 심화될 수 있다. 따라서 이를 개선할 수 있는 방법에 대한 연구가 필요하다. 본 논문에서는 Y결선 정류기를 이용한 3상 인터리브드 LLC 공진형 컨버터의 출력 전류 리플 밸런싱 방법을 제안한다. 제안된 방법은 3상 인터리브드 LLC 공진형 컨버터와 각 LLC 공진형 컨버터 앞단의 Bridgeless PFC가 독립적으로 추가되어 회로가 구성된다. 3상 인터리브드 LLC 공진형 컨버터는 분할된 위상으로 비독립적으로 제어하며 출력 전류 리플의 언밸런스를 Bridgeless PFC의 출력 전압을 가변함으로써 개선할 수 있는 방법을 제안하고 이를 시뮬레이션(PSIM)을 통해 제안된 밸런싱 방법을 검증하였다.