• Title/Summary/Keyword: bottom electrode

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Random-Oriented (Bi,La)4Ti3O12 Thin Film Deposited by Pulsed-DC Sputtering Method on Ferroelectric Random Access Memory Device

  • Lee, Youn-Ki;Ryu, Sung-Lim;Kweon, Soon-Yong;Yeom, Seung-Jin;Kang, Hee-Bok
    • Transactions on Electrical and Electronic Materials
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    • v.12 no.6
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    • pp.258-261
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    • 2011
  • A ferroelectric $(Bi,La)_4Ti_3O_{12}$ (BLT) thin film fabricated by the pulsed-DC sputtering method was evaluated on a cell structure to check its compatibility to high density ferroelectric random access memory (FeRAM) devices. The BLT composition in the sputtering target was $Bi_{4.8}La_{1.0}Ti_{3.0}O_{12}$. Firstly, a BLT film was deposited on a buried Pt/$IrO_x$/Ir bottom electrode stack with W-plug connected to the transistor in a lower place. Then, the film was finally crystallized at $700^{\circ}C$ for 30 seconds in oxygen ambient. The annealed BLT layer was found to have randomly oriented and small ellipsoidal-shaped grains (long direction: ~100 nm, short direction: ~20 nm). The small and uniform-sized grains with random orientations were considered to be suitable for high density FeRAM devices.

Characterization of Copper Saturated-$Ge_xTe_{1-x}$ Solid Electrolyte Films Incoperated by Nitrogen for Programmable Metalization Cell Memory Device

  • Lee, Soo-Jin;Yoon, Soon-Gil;Yoon, Sung-Min;Yu, Byoung-Gon
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2007.06a
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    • pp.174-175
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    • 2007
  • A programmable metallization cell (PMC) memory structure with copper-saturated GeTe solid electrolyte films doped by nitrogen was prepared on a TiW bottom electrode by a co-sputtering technique at room temperature. The $Ge_{45}Te_{55}$ solid electrolyte films deposited with various $N_2$/Ar flow ratios showed an increase of crystallization temperature and especially, the electrolyte films deposited at $N_2$/Ar ratios above 30% showed a crystallization temperature above $400^{\circ}C$, resulting in surviving in a back-end process in semiconductor memory devices. The device with a 200 nm thick $Cu_{1-x}(Ge_{45}Te_{55})_x$ electrolyte switches at 1 V from an "off " state resistance, $R_{off}$, close to $10^5$ to an "on" resistance state, Ron, more than 20rders of magnitude lower for this programming current.

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HTS Josephson Junctions with Deionized Water Treated Interface (증류수 계면처리를 이용한 고온초전도체 죠셉슨 접합 제작)

  • Moon, S.H.;Park, W.K.;Kye, J.I.;Park, J.D.;Oh, B.
    • Progress in Superconductivity
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    • v.2 no.2
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    • pp.76-80
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    • 2001
  • We have fabricated YBa$_2$Cu$_3$$O_{7-x}$ (YBCO) ramp-edge Josephson junctions by modifying ramp edges of the base electrodes without depositing any artificial barrier layer. YBa$_2$Cu$_3$O/7-x//SrTiO$_3$ (YBCO/STO) films were deposited on SrTiO$_3$(100) by on-axis KrF laser deposition. After patterning the bottom YBCO/STO layer, the ramp edge was cleaned by ion-beam and then reacted with deionized water under various conditions prior to the deposition of counter-electrode layers. The top YBCO/STO layer was deposited and patterned by photolithography and ion milling. We measured current-voltage (I-V) characteristics, magnetic field modulation of the critical current at 77 K. Some showed resistively shunted junction (RSJ)-type I-V characteristics, while others exhibited flux-flow behaviors, depending on the dipping time of the ramp edge in deionized water. Junctions fabricated using optimized conditions showed fairly uniform distribution of junction parameters such as I$_{c}$R$_{n}$ values, which were about 0.16 mV at 77 K with 1$\sigma$~ 24%. We made a dc SQUID with the same deionized water treated junctions, and it showed the sinusoidal modulation under applied magnetic field at 77 K. 77 K.

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Thermal Distribution Analysis in Nano Cell OLED (나노 셀 OLED의 열 분포 해석)

  • Kyung-Uk Jang
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.37 no.3
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    • pp.309-313
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    • 2024
  • The key to determining the lifetime of OLED device is how much brightness can be maintained. It can be said that there are internal and external causes for the degradation of OLED devices. The most important cause of internal degradation is bonding and degradation in the excited state due to the electrochemical instability of organic materials. The structure of OLED modeled in this paper consists of a cathode layer, electron injection layer (EIL), electron transport layer (ETL), light emission layer, hole transport layer (HTL), hole injection layer (HIL), and anode layer on a glass substrate from top to bottom. It was confirmed that the temperature generated in OLED was distributed around the maximum of 343.15 K centered on the emission layer. It can be seen that the heat distribution generated in the presented OLED structure has an asymmetrically high temperature distribution toward the cathode, which is believed to be because the sizes of the cathode and positive electrode are asymmetric. Therefore, when designing OLED, it is believed that designing the structures of the cathode and anode electrodes as symmetrically as possible can ensure uniform heat distribution, maintain uniform luminance of OLED, and extend the lifetime. The thermal distribution of OLED was analyzed using the finite element method according to Comsol 5.2.

Delineation of a fault zone beneath a riverbed by an electrical resistivity survey using a floating streamer cable (스트리머 전기비저항 탐사에 의한 하저 단층 탐지)

  • Kwon Hyoung-Seok;Kim Jung-Ho;Ahn Hee-Yoon;Yoon Jin-Sung;Kim Ki-Seog;Jung Chi-Kwang;Lee Seung-Bok;Uchida Toshihiro
    • Geophysics and Geophysical Exploration
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    • v.8 no.1
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    • pp.50-58
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    • 2005
  • Recently, the imaging of geological structures beneath water-covered areas has been in great demand because of numerous tunnel and bridge construction projects on river or lake sites. An electrical resistivity survey can be effective in such a situation because it provides a subsurface image of faults or weak zones beneath the water layer. Even though conventional resistivity surveys in water-covered areas, in which electrodes are installed on the water bottom, do give high-resolution subsurface images, much time and effort is required to install electrodes. Therefore, an easier and more convenient method is sought to find the strike direction of the main zones of weakness, especially for reconnaissance surveys. In this paper, we investigate the applicability of the streamer resistivity survey method, which uses electrodes in a streamer cable towed by ship or boat, for delineating a fault zone. We do this through numerical experiments with models of water-covered areas. We demonstrate that the fault zone can be imaged, not only by installing electrodes on the water bottom, but also by using floating electrodes, when the depth of water is less than twice the electrode spacing. In addition, we compare the signal-to-noise ratio and resolving power of four kinds of electrode arrays that can be adapted to the streamer resistivity method. Following this numerical study, we carried out both conventional and streamer resistivity surveys for the planned tunnel construction site located at the Han River in Seoul, Korea. To obtain high-resolution resistivity images we used the conventional method, and installed electrodes on the water bottom along the planned route of the tunnel beneath the river. Applying a two-dimensional inversion scheme to the measured data, we found three distinctive low-resistivity anomalies, which we interpreted as associated with fault zones. To determine the strike direction of these three fault zones, we used the quick and convenient streamer resistivity.

Fabrication Method of High-density and High-uniformity Solder Bump without Copper Cross-contamination in Si-LSI Laboratory (실리콘 실험실에 구리 오염을 방지 할 수 있는 고밀도/고균일의 Solder Bump 형성방법)

  • 김성진;주철원;박성수;백규하;이희태;송민규
    • Journal of the Microelectronics and Packaging Society
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    • v.7 no.4
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    • pp.23-29
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    • 2000
  • We demonstrate the fabrication method of high-density and high-quality solder bump solving a copper (Cu) cross-contamination in Si-LSI laboratory. The Cu cross-contamination is solved by separating solder-bump process by two steps. Former is via-formation process excluding Cu/Ti under ball metallurgy (UBM) layer sputtering in Si-LSI laboratory. Latter is electroplating process including Ti-adhesion and Cu-seed layers sputtering out of Si-LSI laboratory. Thick photoresist (PR) is achieved by a multiple coating method. After TiW/Al-electrode sputtering for electroplating and via formation in Si-LSI laboratory, Cu/Ti UBM layer is sputtered on sample. The Cu-seed layer on the PR is etched during Cu-electroplating with low-electroplating rate due to a difference in resistance of UBM layer between via bottom and PR. Therefore Cu-buffer layer can be electroplated selectively at the via bottom. After etching the Ti-adhesion layer on the PR, Sn/Pb solder layer with a composition of 60/40 is electroplated using a tin-lead electroplating bath with a metal stoichiometry of 60/40 (weight percent ratio). Scanning electron microscope image shows that the fabricated solder bump is high-uniformity and high-quality as well as symmetric mushroom shape. The solder bumps with even 40/60 $\mu\textrm{m}$ in diameter/pitch do not touch during electroplating and reflow procedures. The solder-bump process of high-uniformity and high-density with the Cu cross-contamination free in Si-LSI laboratory will be effective for electronic microwave application.

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Via-size Dependance of Solder Bump Formation (비아 크기가 솔더범프 형성에 미치는 영향)

  • 김성진;주철원;박성수;백규하;이상균;송민규
    • Journal of the Microelectronics and Packaging Society
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    • v.8 no.1
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    • pp.33-38
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    • 2001
  • We investigate the via-size dependance of as-electroplated- and reflow-bump shapes for realizing both high-density and high-aspect ratio of solder bump. The solder bump is fabricated by subsequent processes as follows. After sputtering a TiW/Al electrode on a 5-inch Si-wafer, a thick photoresist for via formation it obtained by multiple-codling method and then vias with various diameters are defined by a conventional photolithography technique using a contact alinger with an I-line source. After via formation the under ball metallurgy (UBM) structure with Ti-adhesion and Cu-seed layers is sputtered on a sample. Cu-layer and Sn/pb-layer with a competition ratio of 6 to 4 are electroplated by a selective electroplating method. The reflow-bump diameters at bottom are unchanged, compared with as-electroplated diameters. As-electroplated- and reflow-bump shapes, however, depend significantly on the via size. The heights of as-electroplated and reflow bumps increase with the larger cia, while the aspect ratio of bump decreases. The nearest bumps may be touched by decreasing the bump pitch in order to obtain high-density bump. The touching between the nearest bumps occurs during the overplating procedure rather than the reflowing procedure because the mushroom diameter formed by overplating is larger than the reflow-bump diameter. The arrangement as zig-zag rows can be effective for realizing the flip-chip-interconnect bump with both high-density and high-aspect ratio.

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Removal of Residual Stress and In-vitro Recording Test in Polymer-based 3D Neural Probe (폴리머 기반 3차원 뉴런 프로브의 잔류 스트레스 제거 및 생체 외 신호 측정)

  • Nam, Min-Woo;Lim, Chun-Bae;Lee, Kee-Keun
    • Journal of the Microelectronics and Packaging Society
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    • v.16 no.2
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    • pp.33-42
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    • 2009
  • A polymer-based flexible neural probe was fabricated for monitoring of neural activities from a brain. To improve the insertion stiffness, a 5 ${\mu}m$ thick biocompatible Au layer was electroplated between the top and bottom polymer layers. The developed neural probe penetrated a gel whose elastic modulus is similar to that of a live brain tissue without any fracture, To minimize mechanical residual stress and bending from the probe, two new methods were employed: (1) use of a thermal annealing process after completing the device and (2) incorporation of multiple different layers to compensate the residual stress between top and bottom layers. Mechanical bending around the probe tip was clearly removed after employing the two processes. In electrical test, the developed probe showed a proper impedance value to record neural signals from a brain and the result remained the same for 72 hours. In simple in-vitro probe characterization, the probe showed a great removal of residual stress and an excellent recording performance. The in-vitro recording results did not change even after 1 week, suggesting that this electrode has the potential for great recording from neuron firing and long-term implant performance.

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The 4bit Cell Array Structure of PoRAM and A Sensing Method for Drive this Structure (PoRAM의 4bit 셀 어레이 구조와 이를 동작시키기 위한 센싱 기법)

  • Kim, Jung-Ha;Lee, Sang-Sun
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.44 no.6 s.360
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    • pp.8-18
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    • 2007
  • In this paper, a 4bit cell way structure of PoRAM and the sensing method to drive this structure are researched. PoRAM has a different operation from existing SRAM and DRAM. The operation is that when certain voltage is applied between top electrode and bottom electrode of PoRAM device we can classify the cell state by measuring cell current which is made by changing resistance of the cell. In the decoder selected by new-addressing method in the cell array, the row decoder is selected "High" and the column decoder is selected "Low" then certain current will flow to the bit-line. Because this current is detect, in order to make large enough current, the voltage sense amplifier is used. In this case, usually, 1-stage differential amplifier using current mirror is used. Furthermore, the detected value at the cell is current, so a diode connected NMOSFET, that is, a device resistor is used at the input port of the differential amplifier to converter current into voltage. Using this differential amplifier, we can classify the cell states, erase mode is "Low" and write mode is "High", by comparing the input value, Vin, that is a product of current value multiplied by resistor value with a reference voltage, Vref.

Assessment for the Temperature according to the Electrode Diameter of Radio Frequency Hyperthermia Using Agar Phantom (고주파 온열치료기의 전극의 직경에 따른 한천 팬톰의 온도분포 분석)

  • Lee, Yong Hee;Oh, Young Kee;Kim, Hwa Yeong;Jeon, Kyung Soo;Choi, Eun Cheol;Park, Seung Gyu;Kim, Ok Bae;Kim, Jin Hee
    • Progress in Medical Physics
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    • v.25 no.1
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    • pp.1-7
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    • 2014
  • Hyperthermia is effective treatment modality when it combine with the radiotherapy treatment. It is important to verify the temperature distribution of (patient's) body for the safety and effective treatment during raising the temperature. In this study, we raised the temperature in agar phantom using radio frequency (RF) Hyperthermia and protocol that manufacture recommend. Temperature distribution measured 5 section of 5 cm thickness with agar phantom. When the temperature was raised according to the increase energy. Temperature distribution was elevated at similar domain regardless of energy. The temperature tend to be increased at up side then bottom side and also increase when A large electrode was used than small one.