• Journal of information and communication convergence engineering
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• 제7권2호
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• pp.152-156
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• 2009

This paper examines the BER performance of the recently proposed half-symbol-rate-carrier (HSRC) offset quadrature phase-shift-keying (OQPSK) receiver for high-speed data communication. A modified demodulation technique using a bit-time period signal integration, the bit-error-rate (BER) performance of the HSRC-OQPSK signal improves more than 4dB compared to that of a demodulation technique using a symbol-time period integration. This paper also examines the BER performance of modified demodulation with various band-limited channels modeled using low-pass filters, and the three different data-rate systems are simulated and compared with the performance of the system using the conventional demodulation technique.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2003년도 하계종합학술대회 논문집 Ⅳ
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• pp.1915-1919
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• 2003

A practical method of adaptive rate allocation to source and channel codings for an independent loss channel is proposed for Internet video. It is based on the observations that the values of residual loss probabilities at the optimal code rates for different packet loss probabilities are closely clustered to the average residual loss probability for a transmission frame size n in RS(n,k) code and for a total bit rate R. These observations aye then exploited to find the code rate for maximum PSNR. Simulation results demonstrate that the proposed method achieves a near-optimal bit-rate allocation in the joint source-channel coding of H.263 and RS(n,k) codings.

• 정보보호학회논문지
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• 제6권3호
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• pp.71-86
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• 1996

본 논문에서는 ATM(Asynchronous Transfer Mode) 망의 ABR(Available Bit-Rate) 서비스를 위한 폭주 제어 기법 내에서 사용되는 스위치 알고리즘을 제안한다. 이 알고리즘은 명시적 전송률 할당 알고리즘으로서 셀의 전송 경로 중 피드백 지연 시간을 가상적으로 단축하여 왕복 지연이 큰 망 환경과 효율성을 유지한다는 것을 시뮬레이션을 통하여 보인다.

• 전자공학회논문지S
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• 제34S권7호
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• pp.1-8
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• 1997

In this paper, Stokes parameters which represent the states of polarization of transmitted light are determined by potential function, which is used to obtain signals points in a multidimensional Euclidean structure. And performance of multilevel polarization shift keying(POLSK) system using the obtained parameters is also represented and analyzed. As results, bit error rate of multilevel POLSK system using the potential function is shown to be lower than the conventional one using the distance matrix. And as number of levels increases, the number of photons per bit for bit error rate of 10$^{-9}$ is also increased linearly. The multilevel POLSK system, therefore, is an energy efficient modulation technque as compared with the convnetional ones.

• 대한전자공학회논문지SD
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• 제38권3호
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• pp.44-44
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• 2001

본 논문에서는 CMOS로 구현된 3.3V 8-bit 200MSPS의 Folding / Interpolation 구조의 A/D 변환기를 제안한다. 회로에 사용된 구조는 FR(Folding Rate)이 8, NFB(Number of Folding Block)가 4, Interpolation rate 이 8이며, 분산 Track and Hold 구조를 회로를 사용하여 Sampling시 입력주파수를 Hold하여 높은 SNDR을 얻을 수 있었다. 고속동작과 저 전력 기능을 위하여 향상된 래치와 디지털 Encoder를 제안하였고 지연시간 보정을 위한 회로도 제안하였다. 제안된 ADC는 0.35㎛, 2-Poly, 3-Metal, n-well CMOS 공정을 사용하여 제작되었으며, 유효 칩 면적은 1070㎛×650㎛ 이고, 3.3V전압에서 230mW의 전력소모를 나타내었다. 입력 주파수 10MHz, 샘플링 주파수 200MHz에서의 INL과 DNL은 ±1LSB 이내로 측정되었으며, SNDR은 43㏈로 측정되었다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제2권2호
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• pp.141-146
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• 2002

The effect of the wide-bandgap Schottky barrier enhancement cap layer on the performance of metal-semiconductor-metal photodetectors (MSMPD's) is presented. Judged by the dc characteristics, no considerable increase in recombination loss of carriers is resulted by the incorporation of the cap layer. However, about 45% of the detection efficiency is lost for the cap-layered MSMPD's even with a graded layer incorporated under pulse operation, and it was found to be due mainly to the capturing and slow release of the photocarriers at the heterointerface. The loss mechanism of the pulse detection efficiency is believed to be responsible for the intersymbol interference and the increased bit-error-rate (BER) observed in MSMPD's when used with a high bit rate pseudo-random-bit-stream (PRBS) data pattern.

• Journal of Communications and Networks
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• 제14권4호
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• pp.429-433
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• 2012

In this paper, we consider nonbinary quasi-cyclic low-density parity-check (QC-LDPC) codes and propose a method to design multiple rate codes with either fixed information bit length or block bit length, tailored to different scenarios in wireless applications. We show that the proposed codes achieve good performance over a broad range of code rates.

• 전자공학회논문지CI
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• 제40권3호
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• pp.164-170
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• 2003

대표적인 비대칭 워터마킹 방법의 하나의 파워스펙트럼을 이용한 비대칭 워터마킹 방법의 성능을 분석하였다. 파워스펙트럼 도메인의 특성 분석을 통해 간단하면서도 성능 분석에 용이한 상관 검출기를 활용할 수 있음을 보였다. 제안된 상관 검출기를 이용하여 정보량을 늘려가면서 비트 검출 오류율 (bit error rate)을 구하였다. 실험 및 이론 분석 결과는 거의 일치하였으며, 파워스펙트럼 도메인 비대칭 워터마킹 방법은 삽입되는 데이터양이 증가할수록 급격히 그 성능이 나빠지는 것을 확인할 수 있었다.

• 한국통신학회논문지
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• 제22권1호
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• pp.53-63
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• 1997

In this paper, we present a new macroblock-based bit allocation scheme in multiple MPEG-1 video encoders system and a single multiplexer over a single channel. The proposed scheme models the relations between fate(Bits/MB) and distortion(MSE/MB), rate and quantizer parameter(QP), distortion and quantizer parameter, respectively, in the same form. By using these relations, we minimize the Larangian cost function to obtain a bit allocation scheme based on macroblock unit. Experimental results show that the proposed scheme can reduce MSE compared to other conventional buffer-based rate control methods, i.e. independent buffer control method and shared common buffer control one. And we confirmed, through computer simulation, that the proposed scheme can be effectively modified to maintain the objective quality of a specific video service at a constant level.

• 한국통신학회논문지
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• 제22권1호
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• pp.162-172
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• 1997

In this paper, we investigated the performance of a binary feedback switch algorithm for the ABR(Available Bit Rate) service in ATM networks. A binary feedback switch is also called EFCI(Explicit Forward Congestion Indication) switch and can be classificed into input cell processing(IP) scheme according to processing methods for the EFCI bit in data-cell header. We proposed two implementation methods for the binary feedback switch according to EFCI-bit processing schemes, and analyzed the ACR(Allowed Cell Rate) of source and the queue length of switch for each scheme in steady state. In addition, we derived the upper and lower bounds for maximum and minimum queue lengths, respectively, and investigated the impact of ABR parameters on the queue length.