• Journal of the Institute of Electronics Engineers of Korea SP
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• v.45 no.2
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• pp.21-28
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• 2008

This paper proposes a novel reduced-reference assessment method for video quality assessment, in which one-dimensional (1-D) histograms of motion vectors (MVs) are used as features of videos. The proposed method is more efficient than the conventional methods in view of computation time, because the proposed quality metric decodes MVs directly from video stream in the parsing process instead of reconstructing the distorted video at the receiver. Moreover, in view of data size, the propose method is efficient because a sender transmits 1-D histograms of MVs accumulated over whole input video sequences. Here, we use 1-D histograms of MVs accumulated over the whole video sequences, which is different from the conventional methods that assessed each image independently. For testing the similarity between histograms, we use histogram intersection and histogram difference methods. We compare the proposed method with the conventional methods for 52 video clips, which are coded under varying bit rate, image size, and frame rate. Experimental results show that the proposed method is more efficient than the conventional methods and that the proposed method is more similar to the mean opinion score (MOS) than conventional algorithms.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.12 no.6
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• pp.636-642
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• 2019

In this paper, we analyzed BER (Bit Error Rate) communication performance according to the detection order of MMSE (Minimum Mean Square Error) based soft decision interference cancellation. As the detection order method, antenna index order method, absolute value magnitude order method of channel elements, absolute value sum order method of channel elements, and SNR (Signal Noise Ratio) order method are proposed. BER performance for the scheme was measured and analyzed. As a simulation environment, 16-QAM (Quadrature Amplitude Modulation) modulation is used in an uncoded environment of an M×M multiple-input multiple-output system, and an independent Rayleigh attenuation channel is considered. The simulation results show that the performance gain is about 1.5dB when the SNR-based detection order method is M=4, and the performance gain is about 3.5dB when M=8 and about 3.5dB when M=16. The more BER performance was confirmed, the more the detection order method of the received signal prevented the interference and error spreading occurring in the detection process.

• The Journal of the Acoustical Society of Korea
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• v.20 no.6
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• pp.34-39
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• 2001

An adaptive multi-rate (AMR) speech coder was adopted as a standard of W-CDMA by 3GPP and ETSI. The AMR coder is based on the CELP algorithm operating at rates ranging from 12.2 kbps down to 4.75 kbps, and it is a source controlled codec according to the channel error conditions and the traffic loading. In this paper, we implement the DSP S/W of the AMR coder using OakDSPCore. The implementation is based on the CSD17C00A chip developed by C&S Technology, and it is tested using test vectors, for the AMR speech codec, provided by ETSI for the bit exact implementation. The DSP B/W requires 20.6 MIPS for the encoder and 2.7 MIPS for the decoder. Memories required by the Am coder were 21.97 kwords, 6.64 kwords and 15.1 kwords for code, data sections and data ROM, respectively. Also, actual sound input/output test using microphone and speaker demonstrates its proper real-time operation without distortions or delays.

• The Journal of the Acoustical Society of Korea
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• v.19 no.1
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• pp.97-102
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• 2000

Subband coding is to divide the signal frequency band into a set of uncorrelated frequency bands by filtering and then to encode each of these subbands using a bit allocation rationale matched to the signal energy in that subband. The actual coding of the subband signal can be done using waveform encoding techniques such as PCM, DPCM and vector quantizer(VQ) in order to obtain higher data compression. Most researchers have focused on the error in the quantizer, but not on the overall reconstruction error and its dependence on the filter bank. This paper provides a thorough analysis of subband codecs and further development of optimum filter bank design using vector quantizer. We compute the mean squared reconstruction error(MSE) which depends on N the number of entries in each code book, k the length of each code word, and on the filter bank coefficients. We form this MSE measure in terms of the equivalent quantization model and find the optimum FIR filter coefficients for each channel in the M-band structure for a given bit rate, given filter length, and given input signal correlation model. Specific design examples are worked out for 4-tap filter in 2-band paraunitary filter bank structure. These optimum paraunitary filter coefficients are obtained by using Monte Carlo simulation. We expect that the results of this work could be contributed to study on the optimum design of subband codecs using vector quantizer.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.49 no.2
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• pp.94-101
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• 2012

This paper proposes an improved image steganalysis scheme to raise the detection rate of stego images out of cover images. To improve the detection rate of stego image in the steganalysis, tiny variation caused by data hiding should be amplified. For this, we extract feature vectors of cover image and stego image by two steps. First, we separate image into upper 4 bit subimage and lower 4 bit subimage. As a result, stego noise is expanded more than two times. We decompose separated subimages into twelve subbands by applying 3-level Haar wavelet transform and calculate co-occurrence probabilities of two different subbands in the same scale. Since co-occurrence probability of the two wavelet subbands is affected by data hiding, it can be used as a feature to differentiate cover images and stego images. The extracted feature vectors are used as the input to the multilayer perceptron(MLP) classifier to distinguish between cover and stego images. We test the performance of the proposed scheme over various embedding rates by the LSB, S-tool, COX's SS, and F5 embedding method. The proposed scheme outperforms the previous schemes in detection rate to existence of hidden message as well as exactness of discrimination.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.5
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• pp.269-274
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• 2013

To proportionally control the electronic valve position of the actuator, we designed and fabricated PCU, CPT, and rotary absolute optical encoder for the detection of absolute angular position in the actuator. We also designed and constructed the test system by using DAQ hardware and Labview. We designed PCU to convert 1-5 V, 0-5 V, 0-10 V, 2-10 V voltage signals and 4-20 mA current signals to the voltage signals in the common 0.5-2.5 V range. We designed CPT to output 4-20 mA current signals corresponding to the valve positions based on the PWM signal input from the MCU. We also designed 20 bit optical encoder by using infrared LED and infrared transistor and made the serial communication with the main board possible. When we tested PCU and CPT with DAQ hardware and Labview software, they operated correctly with the small errors within ${\pm}0.003$ V and ${\pm}0.01$ mA, respectively, showing that our actuator has the excellent performance to employ as the industrial proportional-valve-actuator. The resolution of the encoder was $11.25^{\circ}$ and the maximum revolution to detect was 32,768.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.13 no.7
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• pp.657-666
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• 2002

In this paper, a new broadband phase shifter to adjust the slope of dispersive phase characteristic for frequency of transmission network was proposed. The new fundamental network consists of a fixed main line with a length of λ/2 at the center frequency and two double stubs, each with a length of λ/8 at the center frequency, which are open and shorted, respectively, and which are shunted at the edge points of the main line. Characteristic impedances of the main line and two parallel double stubs are adjusted to produce a minimum phase error and to obtain an input and output match at the desired phase shift. Especially, the proposed structure is especially suitable for a broadband phase shifter with large phase shifts more than 90$^{\circ}$, and it is operated in the octave bandwidth. To verify the usefulness of a new broadband phase shifter, each 45$^{\circ}$-, 90$^{\circ}$-, 180$^{\circ}$-bit phase shifter and 3-bit phase shifter(45$^{\circ}$-phase step), which is cascaded in series, operated at the center frequency 3 GHz were designed, fabricated and experimented. The measured results were in very close agreement with the corresponding simulation results over the bandwidth of I/O impedance match and phase error for each phase shift.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.7A
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• pp.683-694
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• 2002

In this paper, a digital image compression codec using 2D DWT(Discrete Wavelet Transform) is designed using the FPGA technology for real time operation The implemented image compression codec using wavelet decomposition consists of a wavelet kernel part for wavelet filtering process, a quantizer/huffman coder for quantization and huffman encoding of wavelet coefficients, a memory controller for interface with external memories, a input interface to process image pixels from A/D converter, a output interface for reconstructing huffman codes, which has irregular bit size, into 32-bit data having regular size data, a memory-kernel buffer to arrage data for real time process, a PCI interface part, and some modules for setting timing between each modules. Since the memory mapping method which converts read process of column-direction into read process of the row-direction is used, the read process in the vertical-direction wavelet decomposition is very efficiently processed. Global operation of wavelet codec is synchronized with the field signal of A/D converter. The global hardware process pipeline operation as the unit of field and each field and each field operation is classified as decomposition levels of wavelet transform. The implemented hardware used FPGA hardware resource of 11119(45%) LAB and 28352(9％) ESB in FPGA device of APEX20KC EP20k600CB652-7 and mapped into one FPGA without additional external logic. Also it can process 33 frames(66 fields) per second, so real-time image compression is possible.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.22 no.3
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• pp.389-398
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• 2011

In this paper, the design and fabrication of a transmit/receive(T/R) module for Ka-band phased array radar is presented. A 5bit digital phase shifter and digital attenuator were used in common for both transmitter and receiver considering unique Ka-band characteristic. The circulator was excluded in the T/R module and was placed outside T/R module. The transmitting power per element antenna is designed to be about 1 W and the noise figure is designed to be below 8 dB. The designed T/R module RF part has a compact size of $5\;mm{\times}4\;mm{\times}57\;mm$. In order to implement the T/R module, MMICs used in T/R module was separately assessed before assembly of the designed T/R module. The transmitter of the fabricated T/R module shows about 1 W at 5 dBm unit module input power and the receiver shows a gain of about 20 dB and a noise figure of below 8 dB as expected in the design stage.

• The Journal of the Acoustical Society of Korea
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• v.29 no.5
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• pp.303-313
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• 2010

This paper describes an acoustic communication receiver structure, which is designed for QPSK (Quadrature Phase Shift Keying) signal with 25 kHz carrier frequency and 5 kHz symbol rate, and takes samples from received signal at 100 kHz sampling rate. Based on the described receiver structure, optimum design parameters, such as number of taps of FF (Feed-Forward) and FB (Feed-Back) filters and forgetting factor of RLS (Recursive Least-Square) algorithm, of joint equalizer are determined to minimize the BER (Bit Error Rate) performance of the joint equalizer output symbols when the acquisition data in shallow water using implemented acoustic transducers is decimated at a rate of 2:1 and then enforced to the input of receiver. The transmission distances are 1.4 km, 2.9 km, and 4.7 km. Analysis results show that the optimum number of taps of FF and FB filters are different according to the distance between source and destination, but the optimum or near optimum value of forgetting factor is 0.997. Therefore, we can reach a conclusion that the proper receiver structure could change the number of taps of FF and FB filters with the fixed forgetting factor 0.997 according to the transmission distance. Another analysis result is that there are an acceptable performance degradation when the 16-tap-length simple filter is used as a low-pass filter of receiver instead of 161-tap-length matched filter.