• Title/Summary/Keyword: bit

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Public Transportation Information Profit Model in Using CVM(Focused on BIT) (CVM기법을 이용한 대중교통수익모델 연구(BIT를 중심으로))

  • Park, Bum-Jin;Moon, Byeong-Sup
    • The Journal of the Korea Contents Association
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    • v.11 no.8
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    • pp.459-467
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    • 2011
  • BIS(Bus Information Systems) supplies the bus arrived time information for users in using BIT(Bus Information Terminal) installed on the bus stop. BIT is the device using peoples directly. So, BIT need a quick response when it flew. These are an important factor in the strategy of the BIS maintenance. BIT need a maintenance cost to operate smoothly. So, Suppose that commercial advertisement can be displayed on BIT screen in this study. And we researched an advertisement rates of the optimum level in using Contingent Valuation Method. In addition, we analyzed a characteristic of user's depending on each time using multinomial Logit Modeling method, and studied for BIT operation and ad. displaying strategy considered user's sex, ages and using times.

Bit Operation Optimization and DNN Application using GPU Acceleration (GPU 가속기를 통한 비트 연산 최적화 및 DNN 응용)

  • Kim, Sang Hyeok;Lee, Jae Heung
    • Journal of IKEEE
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    • v.23 no.4
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    • pp.1314-1320
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    • 2019
  • In this paper, we propose a new method for optimizing bit operations and applying them to DNN(Deep Neural Network) in software environment. As a method for this, we propose a packing function for bitwise optimization and a masking matrix multiplication operation for application to DNN. The packing function converts 32-bit real value to 2-bit quantization value through threshold comparison operation. When this sequence is over, four 32-bit real values are changed to one 8-bit value. The masking matrix multiplication operation consists of a special operation for multiplying the packed weight value with the normal input value. And each operation was then processed in parallel using a GPU accelerator. As a result of this experiment, memory saved about 16 times than 32-bit DNN Model. Nevertheless, the accuracy was within 1%, similar to the 32-bit model.

USEFUL REDUNDANT TECHNIQUES FOR BUILT -IN -TEST RELATED SYSTEM

  • Yoo, Wang-Jin;Oh, Hyun-Seung
    • Journal of Korean Institute of Industrial Engineers
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    • v.21 no.2
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    • pp.183-194
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    • 1995
  • This research paper describes several possible suggestions which are essential to develop for Built-In-Test(BIT) related systems, such as more precise BIT parameter analysis, sensitivity analysis of the impact of BIT on redundant systems, statistical inference of field data for BIT performance parameters, methods of reducing BIT false alarms, BIT application in industrial automation and remote control, prevent the system from the impact of BIT failure, undetections and false alarms, life cycle cost analysis for BIT. And, it is mainly focused on redundancy technique for solving BIT diagnostic problems. Algorithms for redundant systems : overlapping technique, flexible redundant BITs are presented and case study will be shown based on various experiment.

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Methodology for digital investigation of illegal sharing using BitTorrent (BitTorrent를 이용한 저작물 불법 공유 조사 방법에 관한 연구)

  • Park, Soo-Young;Chung, Hyun-Ji;Lee, Sang-Jin
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.23 no.2
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    • pp.193-201
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    • 2013
  • Sharing copyrighted files without copyright holder's permission is illegal. But, a number of illegal file sharers using BitTorrent increase. However, it is difficult to find appropriate digital evidences and legal basis to punish them. And, there are no framework for digital investigation of illegal sharing using BitTorrent. Additionally, role of server in BitTorrent had been reduced than server in conventional P2P. So, It is difficult to apply investigation framework for illegal sharing using conventional P2P to investigation process of illegal sharing using BitTorrent. This paper proposes the methodology about punishing illegal sharer using BitTorrent by suggesting the digital investigation framework.

Accuracy Improvement Method for 1-Bit Convolutional Neural Network (1-Bit 합성곱 신경망을 위한 정확도 향상 기법)

  • Im, Sung-Hoon;Lee, Jae-Heung
    • Journal of IKEEE
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    • v.22 no.4
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    • pp.1115-1122
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    • 2018
  • In this paper, we analyze the performance degradation of previous 1-Bit convolutional neural network method and introduce ways to mitigate it. Previous work applies 32-Bit operation to first and last layers. But our method applies 32-Bit operation to second layer too. We also show that nonlinear activation function can be removed after binarizing inputs and weights. In order to verify the method proposed in this paper, we experiment the object detection neural network for korean license plate detection. Our method results in 96.1% accuracy, but the existing method results in 74% accuracy.

The noise impacts of the open bit line and noise improvement technique for DRAM (DRAM에서 open bit line의 데이터 패턴에 따른 노이즈(noise) 영향 및 개선기법)

  • Lee, Joong-Ho
    • Journal of IKEEE
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    • v.17 no.3
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    • pp.260-266
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    • 2013
  • The open bit line is vulnerable to noise compared to the folded bit line when read/write for the DRAM. According to the increasing DRAM densities, the core circuit operating conditions is exacerbated by the noise when it comes to the open bit line 6F2(F : Feature Size) structure. In this paper, the interference effects were analyzed by the data patterns between the bit line by experiments. It was beyond the scope of existing research. 68nm Tech. 1Gb DDR2, Advan Tester used in the experiments. The noise effects appears the degrade of internal operation margin of DRAM. This paper investigates sense amplifier power line splits by experiments. The noise can be improved by 0.2ns(1.3%)~1.9ns(12.7%), when the sense amplifier power lines split. It was simulated by 68nm Technology 1Gb DDR2 modeling.

Replica Technique regarding research for Bit-Line tracking (비트라인 트래킹을 위한 replica 기술에 관한 연구)

  • Oh, Se-Hyeok;Jung, Han-wool;Jung, Seong-Ook
    • Journal of IKEEE
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    • v.20 no.2
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    • pp.167-170
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    • 2016
  • Replica bit-line technique is used for making enable signal of sense amplifier which accurately tracks bit-line of SRAM. However, threshold voltage variation in the replica bit-line circuit changes the cell current, which results in variation of the sense amplifier enable time, $T_{SAE}$. The variation of $T_{SAE}$ makes the sensing operation unstable. In this paper, in addition to conventional replica bit-line delay ($RBL_{conv}$), dual replica bit-line delay (DRBD) and multi-stage dual replica bit-line delay (MDRBD) which are used for reducing $T_{SAE}$ variation are briefly introduced, and the maximum possible number of on-cell which can satisfy $6{\sigma}$ sensing yield is determined through simulation at a supply voltage of 0.6V with 14nm FinFET technology. As a result, it is observed that performance of DRBD and MDRBD is improved 24.4% and 48.3% than $RBL_{conv}$ and energy consumption is reduced which 8% and 32.4% than $RBL_{conv}$.

A New Test Algorithm for Bit-Line Sensitive Faults in High-Density Memories (고집적 메모리에서 BLSFs(Bit-Line Sensitive Faults)를 위한 새로운 테스트 알고리즘)

  • Kang, Dong-Chual;Cho, Sang-Bock
    • Journal of IKEEE
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    • v.5 no.1 s.8
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    • pp.43-51
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    • 2001
  • As the density of memories increases, unwanted interference between cells and coupling noise between bit-lines are increased. And testing high-density memories for a high degree of fault coverage can require either a relatively large number of test vectors or a significant amount of additional test circuitry. So far, conventional test algorithms have focused on faults between neighborhood cells, not neighborhood bit-lines. In this paper, a new test algorithm for neighborhood bit-line sensitive faults (NBLSFs) based on the NPSFs(Neighborhood Pattern Sensitive Faults) is proposed. And the proposed algorithm does not require any additional circuit. Instead of the conventional five-cell or nine-cell physical neighborhood layouts to test memory cells, a three-cell layout which is minimum size for NBLSFs detection is used. Furthermore, to consider faults by maximum coupling noise by neighborhood bit-lines, we added refresh operation after write operation in the test procedure(i.e.,$write{\rightarrow}\;refresh{\rightarrow}\;read$). Also, we show that the proposed algorithm can detect stuck-at faults, transition faults, coupling faults, conventional pattern sensitive faults, and neighborhood bit-line sensitive faults.

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An Analysis on Multiplexing Gain vs. Variable Input Bit Rate Relation for Designing the ATM Multiplexer (ATM 멀티플렉서의 설계를 위한 다중화이득과 가변입력비트율과의 관계 해석)

  • 여재흥;임인칠
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.29A no.8
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    • pp.34-40
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    • 1992
  • This paper shows a new relational formula of multiplexing gain versus variable input bit rates useful for designing Nx1 ATM(Asynchronous Transfer Mode) multiplexer which mixes several asynchronous bit streams with different transmission rates. The relation between multiplexing gain and input bit stream speeds is derived from the occupied mean lenght(the width per unit time) of cells and the occupation probability of the number of cells at an arbitrary instant when the rates of the periodic cell strams change randomly. And the relation between multiplexing gain and variable bit rates from different number of input bit streams is analyzed accordingly. Under the condition of unlimited multiplexing speed, the more number of input bit streams increases, the bigger the multiplexing gain becomes. While for the case which restricts the multiplexing speed to a limited value, the multiplexing gain becomes smaller contrarily as the number of input bit streams continues too invrease beyond a boundary value. It is shown that for designing an ATM multiplexer according to the latter case, the combination of input bit streams should be determined such as its total bit rate is lower thean, but most apprpaximate to, the multiplexed output speed. Also the general formula evaluating the most significant parameters which should be needed to design the multiplexer is derived.

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Optimizing Bit Rate Control for Realtime TV Broadcasting Transmission using LTE Network (LTE 무선통신을 활용한 TV 생방송 중계화면 안정화 비트레이트 조정 연구)

  • Kwon, Mahnwoo;Lim, Hyunchan
    • Journal of Korea Multimedia Society
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    • v.21 no.3
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    • pp.415-422
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    • 2018
  • Advances of telecommunication technology bring various changes in journalism field. Reporters started to gather, edit, and transmit content to main server in media company using hand-held smart media and notebook computer. This paper tried to testify valid bit-rate of visual news content using LTE network and mobile phone. Field news like natural disasters need real-time transmission of video content. But broadcasting company normally use heavy ENG system and transmission satellite trucks. We prepared and experimented different types of visual content that has different bit-rates. Transmission tool was LU-60HD mobile system of LiveU Corporation. Transmission result shows that bit-rate of 2Mbps news content is not suitable for broadcasting and VBR (Variable Bit Rate) transmission has better definition quality than CBR (Constant Bit Rate) method. Three different bit-rate of VBR transmission result shows that 5Mbps clip has better quality than 1Mbps and 3Mbps. The higher bit-rate, the better video quality. But if the content has much movements, that cause delay and abnormal quality of video. So optimizing the balance between stability of signal and quality of bit-rate is crucial factor of real-time broadcasting news gathering business.