• Title/Summary/Keyword: bit

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Enhanced bit-by-bit binary tree Algorithm in Ubiquitous ID System (Ubiquitous ID 시스템에서의 Enhanced bit-by-bit 이진 트리 알고리즘)

  • 최호승;김재현
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • 제41권8호
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    • pp.55-62
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    • 2004
  • This paper proposes and analyzes two anti-collision algorithms in Ubiquitous ID system. We mathematically compares the performance of the proposed algorithms with that of binary search algorithm slotted binary tree algorithm using time slot, and bit-by-bit binary tree algorithm proposed by Auto-ID center. We also validated analytic results using OPNET simulation. Based on analytic result comparing the proposed Modified bit-by-bit binary tree algorithm with bit-by-bit binary tree algorithm which is the best of existing algorithms, the performance of Modified bit-by-bit binary tree algorithm is about 5% higher when the number of tags is 20, and 100% higher when the number of tags is 200. Furthermore, the performance of proposed Enhanced bit-by-bit binary tree algorithm is about 335% and 145% higher than Modified bit-by-bit binary tree algorithm for 20 and 200 tags respectively.

Performance Analysis of Tag Identification Algorithm in RFID System (RFID 시스템에서의 태그 인식 알고리즘 성능분석)

  • Choi Ho-Seung;Kim Jae-Hyun
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • 제42권5호
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    • pp.47-54
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    • 2005
  • This paper proposes and analyzes a Tag Anti-collision algorithm in RFID system. We mathematically compare the performance of the proposed algorithm with existing binary algorithms(binary search algorithm, slotted binary tree algorithm using time slot, and bit-by-bit binary tree algorithm proposed by Auto-ID center). We also validated analytic results using OPNET simulation. Based on analytic result, comparing the proposed Improved bit-by-bit binary tree algerian with bit-by-bit binary tree algorithm which is the best of existing algorithms, the performance of Improved bit-by-bit binary tree algorithm is about $304\%$ higher when the number of tags is 20, and $839\%$ higher when the number of tags is 200.

Built-In-Test Coverage Analysis Considering Failure Mode of Electronics Components (전자부품 고장모드를 고려한 Built-In-Test 성능분석)

  • Seo, Joon-Ho;Ko, Jin-Young;Park, Han-Joon
    • Journal of the Korean Society for Aeronautical & Space Sciences
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    • 제43권5호
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    • pp.449-455
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    • 2015
  • Built-In-Test(hereafter: BIT) is necessary functionality for aircraft flight safety and it requires a high failure detection capacity of more than 95 % in the case of avionics equipment. The BIT coverage analysis is needed to make sure that BIT meets its fault diagnosis capability. FMECA is used a lot of for the BIT coverage analysis. However, in this paper, the BIT coverage analysis based on electronic components is introduced to minimize the analytical error. Further, by applying the failure mode of the electronic components and excluding electronic components that do not affect flight safety, the BIT coverage analysis can be more accurate. Finally, BIT demo was performed and it was confirmed that the performance of the actual BIT matches the analysis of BIT performance.

A Stack Bit-by-Bit Algorithm for RFID Multi-Tag Identification (RFID 다중 태그 인식을 위한 스택 Bit-By-Bit 알고리즘)

  • Lee, Jae-Ku;Yoo, Dae-Suk;Choi, Seung-Sik
    • The Journal of Korean Institute of Communications and Information Sciences
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    • 제32권8A호
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    • pp.847-857
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    • 2007
  • For the implementation of a RFID system, an anti-collision algorithm is required to identify multiple tags within the range of a RFID Reader. A Bit-by-Bit algorithm is defined by Auto ID Class 0. In this paper, we propose a SBBB(Stack Bit-by-Bit) algorithm. The SBBB algorithm save the collision position and makes a query using the saved data. SBBB improve the efficiency of collision resolution. We show the performance of the SBBB algorithm by simulation. The performance of the proposed algorithm is higher than that of BBB algorithm. Especially, the more each tag bit streams are the duplicate, the higher performance is.

Relationship between temperature profiles and bit size during thermomagnetic recording of amorphous TbFe thin film (비정질 TbFe박막의 열자기 기록시 온도분포와 Bit크기의 관계)

  • 이세광;박종철
    • Electrical & Electronic Materials
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    • 제3권3호
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    • pp.187-194
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    • 1990
  • 광자기 메모리용 재료인 비정질 TbFe 박막을 대상으로 열자기 기록시 박막에 분포하는 온도와 이때 만들어지는 bit의 크기간에 상호관련성을 조사하였다. 레이저 조사에 의해 가열된 박막의 온도분포는 유한요소법을 이용한 열전달 해석에 의해 계산하였다. 레이저 가열종료 직전 박막 면에 분포하는 온도 contour로 부터 bit 크기를 예측하였다. 여기서 bit 크기는 온도 상승에 따라 보자력이 약화되어 외부자계와 박막반자장의 합력이 역자구를 만들어 준다고 가정하여 이 경계가 되는 온도(Tcrit)로 이루어지는 등온선의 크기로부터 정하였다. 열자기 기록 실험으로부터 기록 bit의 크기(Dmeas.)을 측정하여 레이저조사조건별로 예측한 bit크기(Dpred.)와 비교하였다. 특히, 레이저 pulse시간 변화에 따른 여러온도의 등온선 contour 직경변화를 조사하여 실측한 bit크기와 비교 검토함으로써 bit형성에 미치는 온도분포의 영향을 조사하였다. 이 결과 레이저 pulse시간이 길어지거나 레이저 power가 상대적으로 작을때 실측한 bit크기가 예측된 bit크기보다 커지는 것으로 나타났으며 이는 Tcrit 온도구배가 완만해질수록 bit경계가 되는 온도가 낮아지는 것으로 해석된다.

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The Mutual Information for Bit-Linear Linear-Dispersion Codes (BLLD 부호의 Mutual Information)

  • Jin, Xiang-Lan;Yang, Jae-Dong;Song, Kyoung-Young;No, Jong-Seon;Shin, Dong-Joon
    • The Journal of Korean Institute of Communications and Information Sciences
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    • 제32권10A호
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    • pp.958-964
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    • 2007
  • In this paper, we derive the relationship between the bit error probability (BEP) of maximum a posteriori (MAP) bit detection and the bit minimum mean square error (MMSE), that is, the BEP is greater than a quarter of the bit USE and less than a half of the bit MMSE. By using this result, the lower and upper bounds of the derivative of the mutual information are derived from the BEP and the lower and upper bounds are easily obtained in the multiple-input multiple-output (MIMO) communication systems with the bit-linear linear-dispersion (BLLD) codes in the Gaussian channel.

A Study on the Data Acquisition by Bit Conversion Method (비트변환방식을 이용한 데이터 취득에 관한 연구)

  • 박상길
    • Journal of the Korean Society of Fisheries and Ocean Technology
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    • 제22권1호
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    • pp.34-40
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    • 1986
  • This paper deals with a new bit conversion method. When 12 bit AID converter is adapted to 16 bit micro-computer, complicated data aquisition method is not necessary to acquire the AID converted data into memory of computer. However, when the 12 bit AID converter is adapted to the 8 bit micro-computer 12 bit data should be divided into 4 bit data and 8 bit data. Therefore the old data-dividing method made 4 bitl2byte of memory space wasted. On the contrary, using the new bit conversion method suggested in this paper the two of 12 bit data are converted into 3 byte of data without extending the AID conversion time.

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A study on the bit-plane coding improvement of EBCOT algorithm (EBCOT 알고리즘의 bit-plane 부호화 개선에 대한 연구)

  • 이호석
    • Proceedings of the Korean Information Science Society Conference
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    • 한국정보과학회 2000년도 가을 학술발표논문집 Vol.27 No.2 (2)
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    • pp.281-283
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    • 2000
  • 본 논문은 EBCOT 알고리즘의 소개와 개선 방법을 제안한다. EBCOT 알고리즘은 웨이블릿 변환과 블록기반 bit-plane 부호화 방법을 활용한 알고리즘이다. EBCOT에서 사용하는 bit-plane 부호화 방법을 블록기반 fractional bit-plane 방법이라고 한다. 이 방법은 bit-plane 전체를 한번에 부호화하는 것이 아니라 블록으로 나누어 부호화를 수행하고 또한 하나의 bit-plane에 대하여서도 4번의 pass를 거치면서 bit의 context에 따라서 부호화를 수행한다. EBCOT는 웨이블릿 변환에 의하여 resolution 스케일러빌리티를 지원하고 fractional bit-plane 부호화에 의하여 SNR 스케일러빌리티를 지원하며 블록기반 부호화에 의하여 ROI에 대한 random 접근 기능을 지원한다. 그리고 EBCOT는 부호화가 완료된 다음에 bit reduction 과정을 수행한다. 이러한 특징들은 이전의 EZW나 SPIHT 방법에 비하여 장점들이라고 할 수 있다. 그러나 bit-plane 부호화를 수행하는 과정에서 효율을 개선할 수 있으며 본 논문은 이에 대한 방법을 제안한다.

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Optimizing Constant Value Generation in Just-in-time Compiler for 64-bit JavaScript Engine (64-bit 자바스크립트 적시 컴파일러를 위한 상수 값 생성 최적화)

  • Choi, Hyung-Kyu;Lee, Jehyung
    • Journal of KIISE
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    • 제43권1호
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    • pp.34-39
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    • 2016
  • JavaScript is widely used in web pages with HTML. Many JavaScript engines adopt Just-in-time compilers to accelerate the execution of JavaScript programs. Recently, many newly introduced devices are adopting 64-bit CPUs instead of 32-bit and Just-in-time compilers for 64-bit CPU are slowly being introduced in JavaScript engines. However, there are many inefficiencies in the currently available Just-in-time compilers for 64-bit devices. Especially, the size of code is significantly increased compared to 32-bit devices, mainly due to 64-bit wide addresses in 64-bit devices. In this paper, we are going to address the inefficiencies introduced by 64-bit wide addresses and values in the Just-in-time compiler for the V8 JavaScript engine and propose more efficient ways of generating constant values and addresses to reduce the size of code. We implemented the proposed optimization in the V8 JavaScript engine and measured the size of code as well as performance improvements with Octane and SunSpider benchmarks. We observed a 3.6% performance gain and 0.7% code size reduction in Octane and a 0.32% performance gain and 2.8% code size reduction in SunSpider.

A Study on Hybrid LB-TJW Algorithm for Multimedia Traffic Control (멀티미디어 트래픽 제어를 위한 Hybrid LB-TJW 알고리즘에 관한 연구)

  • 이병수;구경옥;박성곤;조용환
    • The Journal of Korean Institute of Communications and Information Sciences
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    • 제22권4호
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    • pp.833-841
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    • 1997
  • In this paper, the hybrid LB-TJW(Leaky Bucket-Triggered Jumping Window) algorithm for multimedia traffic control is proposed and its performance is evaluated and analyzed. Its architecture is composed of the peak bit rate controller and the average bit rate controller. Generally, the cell which violates the peak bit rate is discraded in LBalgorithm, and the average bit rate of JW or TJW algorithm is better than that of LB algorithm. However, the hybrid LB-TJW algorithm passes it though the network if the cell does not violate the peak bit rate. If the cell violates the peak bit rate, the hybrid LB-TJW algorithm passes it to the average bit rate controller which perforithm to monitor the average bit rate of input traffic. The TJW algorithm monitors the cell that violates the average bit rate. If the cell does not violate the average bit rare, the LB-TJW algorithm passes it through the network. As simulation results, the cell loss rate and the buffer size of the LB-TJW algorithm is reduced to half as much as those of LB algortihm.

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