• Journal of Communications and Networks
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• v.12 no.5
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• pp.406-410
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• 2010

This paper presents an approach to the construction of non-binary quasi-cyclic (QC) low-density parity-check (LDPC) codes based on multiplicative groups over one Galois field GF(q) and Euclidean geometries over another Galois field GF($2^S$). Codes of this class are shown to be regular with girth $6{\leq}g{\leq}18$ and have low densities. Finally, simulation results show that the proposed codes perform very wel with the iterative decoding.

• Journal of the Chungcheong Mathematical Society
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• v.15 no.2
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• pp.97-107
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• 2003

An efficient algorithm for the multiplication in a binary finite filed using a normal basis representation of $F_{2^m}$ is discussed and proposed for software implementation of elliptic curve cryptography. The algorithm is developed by using the storage scheme of sparse matrices.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.1 no.1
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• pp.91-96
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• 1991

The key exchange idea by using a reduced binary indefinite quadratic form has been introdu-ced. This is based on the difficulty of solving the discrete logarithm problem on the class group of a real quadratic field.

• Proceedings of the KIEE Conference
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• 1996.07a
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• pp.507-509
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• 1996

This paper is concerned with a position, control of induction motors using binary control. Due to the robustness and fast response, variable structure control is widely used for motor control field. However, the chattering phenomenon which is a drawback of VSC deteriorates the control performance and damages system components. In this paper, using binary control which has the characteristics of chattering alleviation and robust property solves this problem. The principle of binary control with inertial external loop and the design method of binary position controller are described. Also the control performance of proposed controller is confirmed by experiments.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.1A
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• pp.35-41
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• 2002

In this paper, we generalize the family of binary bent sequences introduced by Olsen, Scholtz and Welch [2] to obtain the generalized binary bent sequences with optimal correlation and balance properties. The modified trace transform is introduced and it enables us to use linear function from ${F_{2^n}}$ to the intermediate field ${F_{2^e}}$, where e|n. If we choose e=1, our method becomes the conventional binary bent sequence case. Also, some examples are given which show that our construction gives the family of simple binary sequences with optimal correlation and balance properties.

• Journal of Sensor Science and Technology
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• v.30 no.2
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• pp.82-87
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• 2021

In this paper, we propose a high-speed, low-power complementary metal-oxide semiconductor (CMOS) binary image sensor featuring a gate/body-tied (GBT) p-channel metal-oxide-semiconductor field-effect transistor (PMOSFET)-type photodetector based on a double-tail comparator. The GBT photodetector forms a structure in which the floating gate (n+ polysilicon) and body of the PMOSFET are tied, and amplifies the photocurrent generated by incident light. The double-tail comparator compares the output signal of a pixel against a reference voltage and returns a binary signal, and it exhibits improved power consumption and processing speed compared with those of a conventional two-stage comparator. The proposed sensor has the advantages of a high signal processing speed and low power consumption. The proposed CMOS binary image sensor was designed and fabricated using a standard 0.18 ㎛ CMOS process.

• Proceedings of the Korea Multimedia Society Conference
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• 2003.11a
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• pp.158-161
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• 2003

1985년 N. Koblitz와 V. Miller가 각각 독립적으로 제안한 타원곡선 암호시스템(ECC : Elliptic Curve Cryptosystems)은 유한체 위에서 정의된 타원곡선 군에서의 이산대수 어려움에 기초한다. 타원곡선 암호시스템은 다른 공개키 시스템에 비해 보다 짧은 길이의 키만으로도 동일한 수준의 안전도를 유지할 수 있다는 장점으로 인하여, 스마트카드나 모바일 시스템 등에서와 같이 메모리와 처리능력이 제한된 하드웨어에도 이식 가능한 장점이 있다. 본 논문에서는 타원곡선 암호시스템에 필요한 유한체 연산을 이진체(Binary Finite Field)인 GF(2$^{193}$ )과 OEF(Oprimal Extension Field) 상에서 VHDL 언어를 사용하여 구현을 하였고 각 연산의 성능을 비교하였다.

• JSTS:Journal of Semiconductor Technology and Science
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• v.17 no.3
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• pp.425-437
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• 2017

For efficient hardware (HW) implementation of elliptic curve cryptography (ECC), various sub-modules for the underlying finite field operations should be implemented efficiently. Among these sub-modules, modular inversion (MI) requires the most computation; therefore, its performance might be a dominant factor of the overall performance of an ECC module. To determine the most efficient MI algorithm for an HW ECC module, we implement various classes of MI algorithms and analyze their performance. In contrast to the common belief in previous research, our results show that the right-shift binary inversion (RS) algorithm performs well when implemented in hardware. In addition, we present optimization methods to reduce the area overhead and improve the speed of the RS algorithm. By applying these methods, we propose a new RS-variant that is both fast and compact. The proposed MI module is more than twice as fast as the other two classes of MI: shifting Euclidean (SE) and left-shift binary inversion (LS) algorithms. It consumes only 15% more area and even 5% less area than SE and LS, respectively. Finally, we show that how our new method can be applied to optimize an HW ECC module.

• Journal of Sensor Science and Technology
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• v.30 no.1
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• pp.61-65
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• 2021

In this study, we propose a 2500 frame per second (fps) high-speed binary complementary metal oxide semiconductor (CMOS) image sensor using a gate/body-tied (GBT) p-channel metal oxide semiconductor field effect transistor-type high-speed photodetector. The GBT photodetector generates a photocurrent that is several hundred times larger than that of a conventional N+/P-substrate photodetector. By implementing an additional binary operation for the GBT photodetector with such high-sensitivity characteristics, a high-speed operation of approximately 2500 fps was confirmed through the output image. The circuit for binary operation was designed with a comparator and 1-bit memory. Therefore, the proposed binary CMOS image sensor does not require an additional analog-to-digital converter (ADC). The proposed 2500 fps high-speed operation binary CMOS image sensor was fabricated and measured using standard CMOS process.

• Journal of Electrical Engineering and Technology
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• v.11 no.2
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• pp.455-462
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• 2016

The electron transport coefficients in not only pure atoms and molecules but also in the binary gas mixtures are necessary, especially on understanding quantitatively plasma phenomena and ionized gases. Electron transport coefficients (electron drift velocity, density-normalized longitudinal diffusion coefficient, and density-normalized effective ionization coefficient) in binary mixtures of TEOS gas with buffer gases such as Kr, Xe, He, and Ne gases, therefore, was analyzed and calculated by a two-term approximation of the Boltzmann equation in the E/N range (ratio of the electric field E to the neutral number density N) of 0.1 - 1000 Td (1 Td = 10⁻¹⁷ V.cm²). These binary gas mixtures can be considered to use as the silicon sources in many industrial applications depending on mixture ratio and particular application of gas, especially on plasma assisted thin-film deposition.