• Journal of electromagnetic engineering and science
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• v.17 no.2
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• pp.105-107
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• 2017

The self-biasing circuit through a feedback resistor is applied to a gallium nitride (GaN) distributed power amplifier (PA) monolithic microwave circuit (MMIC). The self-biasing circuit is a useful scheme for biasing depletion-mode compound semiconductor devices with a negative gate bias voltage, and is widely used for common source amplifiers. However, the self-biasing circuit is rarely used for PAs, because the large DC power dissipation of the feedback resistor results in the degradation of output power and power efficiency. In this study, the feasibility of applying a self-biasing circuit through a feedback resistor to a GaN PA MMIC is examined by using the high operation voltage of GaN high-electron mobility transistors. The measured results of the proposed GaN PA are the average output power of 41.1 dBm and the average power added efficiency of 12.2% over the 6-16 GHz band.

• Journal of Magnetics
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• v.7 no.3
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• pp.94-97
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• 2002

The dependence on nickel oxide thickness and a ferromagnetic layer thickness in unidirectional and isotropic exchange-coupled NiO/NiFe(Fe) bilayer films was investigated by magnetic force microscopy to better understand the relation between magnetic domain structure and exchange biasing at microscopic length scales. As the NiO thickness increased, the domain structure of unidirectional biased films formed smaller and more complex in-plane domains. By contrast, for the isotropically coupled films, large domains generally formed with increasing NiO thickness including a cross type domain with out-of plane magnetization orientation. The density of the cross domain is proportional to exchange biasing field, and the fact that the domain mainly originated from the strongest exchange coupled region was confirmed by imaging in an applied external field during a magnetization cycle.

• ETRI Journal
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• v.31 no.6
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• pp.755-764
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• 2009

This paper presents a switched self-biasing and a tail current-shaping technique to suppress the 1/f noise from a tail current source in differential cross-coupled inductance-capacitance (LC) voltage-controlled oscillators (VCOs). The proposed LC VCO has an amplitude control characteristic due to the creation of negative feedback for the oscillation waveform amplitude. It is fabricated using a 0.13 ${\mu}m$ CMOS process. The measured phase noise is -117 dBc/Hz at a 1 MHz offset from a 4.85 GHz carrier frequency, while it draws 6.5 mA from a 0.6 V supply voltage. For frequency tuning, process variation, and temperature change, the amplitude change rate of the oscillation waveform in the proposed VCO is 2.1 to 3.2 times smaller than that of an existing VCO with a fixed bias. The measured amplitude change rate of the oscillation waveform for frequency tuning from 4.55 GHz to 5.04 GHz is 131 pV/Hz.

• JSTS:Journal of Semiconductor Technology and Science
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• v.10 no.2
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• pp.118-129
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• 2010

A lower-threshold-voltage (LVth) SRAM cell with an elevated cell biasing scheme, which enables to reduce the random threshold-voltage (Vth) variation and to alleviate the stability-degradation caused by word-line (WL) and cell power line (VDDM) disturbed accesses in row and column directions, has been proposed. The random Vth variation (${\sigma}Vth$) is suppressed by the proposed LVth cell. As a result, the LVth cell reduces the variation of static noise margin (SNM) for the data retention, which enables to maintain a higher SNM over a larger memory size, compared with a conventionally being used higher Vth (HVth) cell. An elevated cell biasing scheme cancels the substantial trade-off relationship between SNM and the write margin (WRTM) in an SRAM cell. Obtained simulation results with a 45-nm CMOS technology model demonstrate that the proposed techniques allow sufficient stability margins to be maintained up to $6{\sigma}$ level with a 0.5-V data retention voltage and a 0.7-V logic bias voltage.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.22 no.2
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• pp.169-173
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• 2009

We studied driving characteristics according to the ratio of mass and charging (m/q) value for charged toner particles with black and yellow color in charged particle type display panel. After biasing rectangle pulse to the transparency electrodes of putted panel with toner particles, its response time and contrast ratio are simultaneously measured using a laser as a optical source, photodiode as a detector and reflective system. As a results, contrast ratio is largest at the shortest response time region which is different to the particle because of m/q. We proposed relational equation for response time, m/q, cell gap and biasing voltage. It has not been studied and reported to analyze the relationship of response time, biasing voltage, lumping phenomena, cell gap, and contrast ratio for toner particle type display.

• Nuclear Engineering and Technology
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• v.49 no.6
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• pp.1172-1180
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• 2017

The application of Monte Carlo (MC) to large-scale fixed-source problems has recently become possible with new hybrid methods that automate generation of parameters for variance reduction techniques. Two common variance reduction techniques, weight windows and source biasing, have been automated and popularized by the consistent adjoint-driven importance sampling (CADIS) method. This method uses the adjoint solution from an inexpensive deterministic calculation to define a consistent set of weight windows and source particles for a subsequent MC calculation. One of the motivations for source consistency is to avoid the splitting or rouletting of particles at birth, which requires computational resources. However, it is not always possible or desirable to implement such consistency, which results in inconsistent source biasing. This paper develops an original framework that mathematically expresses the coupling of the weight window and source biasing techniques, allowing the authors to explore the impact of inconsistent source sampling on the variance of MC results. A numerical experiment supports this new framework and suggests that certain classes of problems may be relatively insensitive to inconsistent source sampling schemes with moderate levels of splitting and rouletting.

• Journal of the Institute of Electronics and Information Engineers
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• v.49 no.9
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• pp.55-64
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• 2012

Until now, Side Channel Attack has been known to be effective to crack decrypt key such as smart cards, electronic passports and e-ID card based on Chip. Combination of Masking and shuffling methods have been proposed practical countermeasure. Newly, S.Tillich suggests biased-mask using template attack(TA) to attack AES with masking and shuffling. However, an additional assumption that is acquired template information previously for masking value is necessary in order to apply this method. Moreover, this method needs to know exact time position of the target masking value for higher probability of success. In this paper, we suggest new practical method called Biasing Power Analysis(BPA) to find a secret key of AES based on masking-shuffling method. In BPA, we don't use time position and template information from masking value. Actually, we do experimental works of BPA attack to 128bit secret key of AES based on masking-shuffling method performed MSP430 Chip and we succeed in finding whole secret key. The results of this study will be utilized for next-generation ID cards to verify physical safety.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.26 no.10
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• pp.932-935
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• 2015

This paper proposes a rectifier using bootstrapping and active body biasing in $0.11{\mu}m$ RF CMOS process. The proposed rectifier employs the full-wave rectifying structure with cross coupling and increases the power conversion efficiency by reducing the threshold voltage and leakage current using bootstrapping and active bias biasing. Also, it has been designed to be applied to a wide range of applications from 13.56 MHz used in wireless power transmission to 915 MHz used in RFID. As a measured result, 80 % of power conversion efficiency is obtained when the input power is 0 dBm at $10k{\Omega}$ load resistance and 13.56 MHz. Also 40 % of power conversion efficiency is shown in 915 MHz.

• Journal of Navigation and Port Research
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• v.26 no.2
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• pp.215-220
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• 2002

In this paper, the 100 watt unit ower amplifier using temperature independent biasing for DTV (Digital Television) repeater application is designed and fabricated. The DC operation point of this unit power amplifier at temperature variation from $20^{\circ}C$ to $100^{\circ}C$ is fixed by active bias circuit. The variation of current consumption in the 100 watt unit power amplifier has an excellent characteristics of less than 0.6A. The implemented unit power amplifier has the gain over 12dB, the gain flatness of less than 0.5dB and input and output return, loss of than 15dB over the DTV repeater frequency range (470~806MHz). This unit power amplifier yields intermodulation distortion(IMD) of more than 32dBc at 2MHz offset, which satisfies the IMD at output power of 100 watt (50dBm).

• Journal of Advanced Marine Engineering and Technology
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• v.32 no.8
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• pp.1263-1268
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• 2008

In this paper, the low noise power amplifier for GaAs FET ATF-10136 is designed and fabricated with active bias circuit and self bias circuit. To supply most suitable voltage and current, active bias circuit is designed. Active biasing offers the advantage that variations in the pinch-off voltage($V_p$) and saturated drain current($I_{DSS}$) will not necessitate a change in either the source or drain resistor value for a given bias condition. The active bias network automatically sets a gate-source voltage($V_{gs}$) for the desired drain voltage and drain current. Using resistive decoupling circuits, a signal at low frequency is dissipated by a resistor. This design method increases the stability of the LNA, suitable for input stage matching and gate source bias. The LNA is fabricated on FR-4 substrate with active and self bias circuit, and integrated in aluminum housing. As a results, the characteristics of the active and self bias circuit LNA implemented more than 13 dB and 14 dB in gain, lower than 1 dB and 1.1 dB in noise figure, 1.7 and 1.8 input VSWR at normalized frequency $1.4{\sim}1.6$, respectively.