• 제목/요약/키워드: basic research

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신흥공업국의 기초연구능력 축적과정의 특성에 대한 탐색연구 -한국 사례를 중심으로- (An Exploratory Research on the Accumulation of Basic Research Capability in the Newly Developing Countries)

  • 황혜란
    • 기술혁신학회지
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    • 제7권1호
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    • pp.42-63
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    • 2004

  • Recent trend of rapid growth in the basic research activities in East-Asian newly industrialized countries bring about the change in the world knowledge production structure. Particularly, Korea showed the changing patterns not only in the number of publication, but also in the aspect of structural change of basic research activities. The stylized facts of basic research activities in Korea can be summarized in three aspects; first, selective development patterns, second, reverse pattern of evolution, and finally, the rapid growth of basic research activities in major firms. This paper analyse the evolutionary patterns of basic research activities in empirical base and propose the policy implication for supporting basic research activity in newly industrializing countries.

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Ultra low temperature polycrystalline silicon thin film transistor using sequential lateral solidification and atomic layer deposition techniques

  • Lee, J.H.;Kim, Y.H.;Sohn, C.Y.;Lim, J.W.;Chung, C.H.;Park, D.J.;Kim, D.W.;Song, Y.H.;Yun, S.J.;Kang, K.Y.
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2004년도 Asia Display / IMID 04
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    • pp.305-308
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    • 2004

  • We present a novel process for the ultra low temperature (<150$^{\circ}C$) polycrystalline silicon (ULTPS) TFT for the flexible display applications on the plastic substrate. The sequential lateral solidification (SLS) was used for the crystallization of the amorphous silicon film deposited by rf magnetron sputtering, resulting in high mobility polycrystalline silicon (poly-Si) film. The gate dielectric was composed of thin $SiO_2$ formed by plasma oxidation and $Al_2O_3$ deposited by plasma enhanced atomic layer deposition. The breakdown field of gate dielectric on poly-Si film showed above 6.3 MV/cm. Laser activation reduced the source/drain resistance below 200 ${\Omega}$/ㅁ for n layer and 400 ${\Omega}$/ㅁ for p layer. The fabricated ULTPS TFT shows excellent performance with mobilities of 114 $cm^2$/Vs (nMOS) and 42 $cm^2$/Vs (pMOS), on/off current ratios of 4.20${\times}10^6$ (nMOS) and 5.7${\times}10^5$ (PMOS).

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