• Title/Summary/Keyword: balanced amplifier

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Design of V/UHF band Small Dipole Circular Array Active Antenna (V/UHF대역 소형다이폴 원형배열 능동안테나 설계)

  • Ko, Ji-Hwan;Lee, Cheol-Soo;Kim, Kang-Uk;Cho, Young-Ki
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.13 no.1
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    • pp.6-16
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    • 2009
  • For the application to the direction finding(DF) antenna for V/UHF bands, circular active array composed of 9 dipole element has been investigate. For miniaturization of the overall size array, the element has been chosen to be of the top-hat dipole type. For the broadband operation over 20-1300MHz, some number of pin diodes have been inserted in each arms of each dipole element. By employing this type of each element dipole, the effective dipole length can be increased or decreased according as the inserted pin diodes is on or off. The active array antenna has been design to be directly connected to the balanced push full amplifier such that the amplifier may play a role as a balloon and may improve the sensitivity as a receiver as well. The active array antenna has been designed and fabricated. Some experimental results have been presented in comparison with simulated results.

A 3 Stage MMIC Low Noise Amplifier for the Ka Band Satellite Communications and BWLL System (Ka 대역 위성통신 및 BWLL 시스템용 3단 MMIC 저잡음 증폭기 설계 및 제작)

  • 염인복;정진철;이성팔
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.12 no.1
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    • pp.71-76
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    • 2001
  • A Ka Band 3-stage MMIC (Monolithic Microwave Integrated Circuits) LNA (Low Noise Amplifiers) has been designed and fabricated far the Ka band satellite communications and BWLL(Broad Band Wireless Local Loop)system. The MMIC LNA consists of two single-ended type amplification stages and one balanced type amplification stage to satisfy noise figure, high gain and amplitude linearity. The 0.15${\mu}{\textrm}{m}$ pHEMT has been used to provide a ultra low noise figure and high gain amplification. Series and Shunt feedback circuits and λ/4 short lines were inserted to ensure high stability over the frequency range form DC to 80 GHz. The size of the MMIC LNA is 3.1mm$\times$2.4mm(7.44mm$^2$). The on wafer measured performance of the MMIC LNA, which agreed with the designed performance, showed the noise figure of less than 2.0 dB, and the gain of more than 26 dB, over frequency ranges from 22 GHz to 30 GHz.

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A Study on Design and Implementation of Low Noise Amplifier for Satellite Digital Audio Broadcasting Receiver (위성 DAB 수신을 위한 저잡음 증폭기의 설계 및 구현에 관한 연구)

  • Jeon, Joong-Sung;You, Jae-Hwan
    • Journal of Navigation and Port Research
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    • v.28 no.3
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    • pp.213-219
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    • 2004
  • In this paper, a LNA(Low Noise Amplifier) has been developed, which is operating at L-band i.e., 1452∼1492 MHz for satellite DAB(Digital Audio Brcadcasting) receiver. The LNA is designed to improve input and output reflection coefficient and VSWR(Voltage Standing Wave Ratio) by balanced amplifier. The LNA consists of low noise amplification stage and gain amplification stage, which make a using of GaAs FET ATF-10136 and VNA-25 respectively, and is fabricated by hybrid method. To supply most suitable voltage and current, active bias circuit is designed Active biasing offers the advantage that variations in $V_P$ and $I_{DSS}$ will not necessitate a change in either the source or drain resistor value for a given bias condition. The active bias network automatically sets $V_{gs}$ for the desired drain voltage and drain current. The LNA is fabricated on FR-4 substrate with RF circuit and bias circuit, and integrated in aluminum housing. As a reults, the characteristics of the LNA implemented more than 32 dB in gain. 0.2 dB in gain flatness. lower than 0.95 dB in noise figure, 1.28 and 1.43 each input and output VSWR, and -13 dBm in $P_{1dB}$.

High-Quality Bondwire Integrated Transformer (고품질 본드와이어 집적형 트랜스포머)

  • Song, Byeong-Uk;Lee, Hae-Yeong
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.39 no.2
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    • pp.81-91
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    • 2002
  • In this paper, a high-quality integrated transformer using bondwires is proposed and fabricated. The bondwire transformer inherently has low conductor loss due to wide cross-section and small parasitic capacitance because the vertical placement of the bondwire loop separates from substrate and effectively reduces the substrate effects. It can be fabricated easily by used of the modern automatic wirebonding technology. The electrical characteristics of the fabricated transformers are compared with those of the spiral transformer It is expected that the bondwire transformer can improve the performance for RFIC and MMIC applied to a variety of application, for example, Mixer, Balanced Amplifier, VCO, and LNA.

An Integrated High Linearity CMOS Receiver Frontend for 24-GHz Applications

  • Rastegar, Habib;Ryu, Jee-Youl
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.16 no.5
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    • pp.595-604
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    • 2016
  • Utilizing a standard 130-nm CMOS process, a RF frontend is designed at 24 GHz for automotive collision avoidance radar application. Single IF direct conversion receiver (DCR) architecture is adopted to achieve high integration level and to alleviate the DCR problem. The proposed frontend is composed of a two-stage LNA and downconversion mixers. To save power consumption, and to enhance gain and linearity, stacked NMOS-PMOS $g_m$-boosting technique is employed in the design of LNA as the first stage. The switch transistors in the mixing stage are biased in subthreshold region to achieve low power consumption. The single balanced mixer is designed in PMOS transistors and is also realized based on the well-known folded architecture to increase voltage headroom. This frontend circuit features enhancement in gain, linearity, and power dissipation. The proposed circuit showed a maximum conversion gain of 19.6 dB and noise figure of 3 dB at the operation frequency. It also showed input and output return losses of less than -10 dB within bandwidth. Furthermore, the port-to-port isolation illustrated excellent characteristic between two ports. This frontend showed the third-order input intercept point (IIP3) of 3 dBm for the whole circuit with power dissipation of 6.5 mW from a 1.5 V supply.

Down Conversion Mixer for Millimeter Band (밀리피터파 대역 하향 변환 혼합기)

  • Ji, Hong-Gu;Oh, Seung-Hyeub
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.21 no.11
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    • pp.1318-1323
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    • 2010
  • A lot of demand for parts of millimeter wave band, as would be expected 57~63 GHz band down conversion mixer was designed and fabricated using IHP 0.25 um SiGe process. Designed and fabricated mixer was double balanced type and located reduced 3D balun at RF port and buffer amplifier at outport for suppression LO signal and conversion gain. Fabricated mixer measured conversion gain of 13.8 dB, $P1dB_{in}$ -17 dBm and 88 mA of current consumption characteristics, respectively.

An MMIC Doubly Balanced Resistive Mixer with a Compact IF Balun (소형 IF 발룬이 내장된 MMIC 이중 평형 저항성 혼합기)

  • Jeong, Jin-Cheol;Yom, In-Bok;Yeom, Kyung-Whan
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.19 no.12
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    • pp.1350-1359
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    • 2008
  • This paper presents a wideband doubly balanced resistive mixer fabricated using $0.5{\mu}m$ GaAs p-HEMT process. Three baluns are employed in the mixer. LO and RF baluns operating over an 8 to 20 GHz range were implemented with Marchand baluns. In order to reduce chip size, the Marchand baluns were realized by the meandering multicoupled line and inductor lines were inserted to compensate for the meandering effect. IF balun was implemented through a DC-coupled differential amplifier. The size of IF balun is $0.3{\times}0.5\;mm^2$ and the measured amplitude and phase unbalances were less than 1 dB and $5^{\circ}$, respectively from DC to 7 GHz. The mixer is $1.7{\times}1.8\;mm^2$ in size, has a conversion loss of 5 to 11 dB, and an output third order intercept(OIP3) of +10 to +15 dBm at 16 dBm LO power for the operating bandwidth.

Design of the PAM with High Linearity and Efficiency for Wibro (고선형성, 고효율의 Wibro용 PAM 설계)

  • Oh Inn-Yeal;Kim Tae-Soo;Rhe Kun-Moo
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.17 no.6 s.109
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    • pp.519-528
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    • 2006
  • This thesis is regarding of fabricating wibro PAM. First of all, we need to set specification based on link budget for wibro communication circumstance in order to develop PAM, then we decided specification concerning of wibro PAM by considering TTAS_Ko_06_0082R1 which is standarded in Korea, and IEEE Std. 802. 16d/e which is international standard. We selected the Doherty structure to increase efficiency, and pre-distorter structure to increase linearity. The fabricated PAM has not only a result of $26.5dB{\pm}1.0dB$ gain characteristics and maximum of -14 dB return loss characteristics in full frequency bands and full output ranges, but also a result of 37 dBc at 4 tone IMD characteristics which is improved result of 843 and a result of 31 dBc spurious characteristics which is improved result of 5 dB at 4.77 MHz offset point in status of having 27 % efficiency in the 26 dBm high power amplifier output signal. We confirmed the suggested structure is better than others by comparing with normal structure, balanced structure and Doherty structure without predistorter.

Design and Fabrication of a GaAs MESFET MMIC Transmitter for 2.4 GHz Wireless Local Loop Handset (2.4 GHz WLL 단말기용 GaAs MESFET MMIC 송신기 설계 및 제작)

  • 성진봉;홍성용;김민건;김해천;임종원;이재진
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.11 no.1
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    • pp.84-92
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    • 2000
  • A GaAs MESFET MMIC transmitter for 2.4 GHz wireless local loop handset is designed and fabricated. The transmitter consists of a double balanced active mixer and a two stage driver amplifier with voltage negative feedback. In particular, a pair of CS-CG(common source-common gate) structure compensates the reduction in dynamic range caused by unbalanced complementary IF input signals. And to suppress the leakage local power at RF port, the mixer is designed by using phase characteristic between the ports of MESFET. At the bias condition of 2.7 V and 55.2 mA, the fabricated MMIC transmitter with chip dimensions of $0.75\times1.75 mm^2$ obtains a measured conversion gain of 38.6 dB, output $P_{idB}$ of 11.6 dBm, and IMD3 at -5 dBm RF output power of -31.3 dBc. This transmitter is well suited for WLL handset.

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Design of Variable Gain Receiver Front-end with Wide Gain Variable Range and Low Power Consumption for 5.25 GHz (5.25 GHz에서 넓은 이득 제어 범위를 갖는 저전력 가변 이득 프론트-엔드 설계)

  • Ahn, Young-Bin;Jeong, Ji-Chai
    • Journal of IKEEE
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    • v.14 no.4
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    • pp.257-262
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    • 2010
  • We design a CMOS front-end with wide variable gain and low power consumption for 5.25 GHz band. To obtain wide variable gain range, a p-type metal-oxide-semiconductor field-effect transistor (PMOS FET) in the low noise amplifier (LNA) section is connected in parallel. For a mixer, single balanced and folded structure is employed for low power consumption. Using this structure, the bias currents of the transconductance and switching stages in the mixer can be separated without using current bleeding path. The proposed front-end has a maximum gain of 33.2 dB with a variable gain range of 17 dB. The noise figure and third-order input intercept point (IIP3) are 4.8 dB and -8.5 dBm, respectively. For this operation, the proposed front-end consumes 7.1 mW at high gain mode, and 2.6 mW at low gain mode. The simulation results are performed using Cadence RF spectre with the Taiwan Semiconductor Manufacturing Company (TSMC) $0.18\;{\mu}m$ CMOS technology.)