• 한국진공학회:학술대회논문집
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• 한국진공학회 2010년도 제39회 하계학술대회 초록집
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• pp.189-189
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• 2010

최근 연구와 생산에 가속이 붙기 시작한 AMOLED는 모두 LTPS TFT를 사용하고 있다. LTPS TFT는 높은 전자 이동도를 가지고 있기 때문에 현재 각광 받는 AMOLED에 잘 맞는다. 하지만 LTPS TFT는 균일성이 낮고 고비용이라는 문제점이 있으며, 현재 대면적 기술이 부족한 상태이다. 극복방안으로 AMOLED를 타겟으로 하는 Oxide TFT와 a-Si TFT의 기술이 발전되고 있다. Oxide TFT는 AMOLED backplane으로 사용될 수 있는 강력한 후보 중의 하나이다. Oxide TFT는 단결정 산화물과 다결정 복합 산화물 두 가지 범주를 가지고 있다. 본 연구에서는 다결정 Oxide TFT의 하나인 ZTO TFT를 연구함으로서 Engineer의 근본적 이슈인 저비용에 초점을 맞추어 소자특성을 확인해보도록 한다. n-type wafer 에 PE-CVD 장비를 이용하여 SiNx를 120 nm 증착하고, channel layer인 ZTO 용액을 spin-coating을 이용하여 형성하였다. 균일하게 형성된 ZTO의 결정을 위하여 $500^{\circ}C$에서 1시간 동안 공기 중에서 annealing을 하였다. 과정을 거친 ZTO는 약 30 nm 두께로 형성되었다. Thermal evaporator를 이용하여 Source, Drain의 전극을 형성 하고, wafer 뒷면에는 Silver paste를 이용하여 Gate를 형성하였다. 제작된 소자를 dark room temperature 에서 측정 하였다. 측정된 소자는 우수한 전기적 특성과 0.96 cm2/Vs 인 이동도를 얻어냈다. 이러한 소자의 안정성에 따른 전기적 특성을 관측하기 위하여 상온에서 $100^{\circ}C$ 까지의 온도 스트레스를 주었다. Stress에 따른 소자는 상온에서 시작하여 온도가 올라갈수록 이동도가 낮아지고, 문턱전압 증가와 SS이 커짐을 알 수 있었다. 캐리어의 운동 매커니즘에서 온도가 올라가면 격자진동의 영향을 크게 받음으로서 캐리어의 이동도가 낮아져 전기적 특성이 낮아지는 점이 본 연구에도 적용됨을 알 수 있었다. 본 연구를 통하여 화학적 안정성을 지닌 소자라는 점과 더불어 여타 TFT공정에 비하여 현저히 낮은 공정비용을 통하여 AMOLED가 요구하는 수준의 특성에 가까운 소자를 제작할 수 있다는 것을 확인하였으며 앞으로의 추가적인 연구에 따라서 더욱 완성된 공정기술을 기대할 수 있었다.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
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• pp.470-470
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• 2012

Organic thin film transistors (OTFTs) backplane constitute the active elements in new generations of plastic electronic devices for flexible display. The overall OTFTs performance is largely depended on the properties and quality of each layers of device material. In solution based process of organic semiconductors (OSCs), the interface state is most impediments to preferable performance. Generally, a threshold voltage (Vth) shift is usually exhibited when organic gate insulators (OGIs) are exposed in an ambient air condition. This phenomenon was caused by the absorbed polar components (i.e. oxygen and moisture) on the interface between OGIs and Soluble OSCs during the jetting process. For eliminating the polar component at the interface of OGI, the role of high vacuum seasoning on an OGI for all solution processable OTFTs were studied. Poly 4-vinly phenols (PVPs) were the material chosen as the organic gate dielectric, with a weakness in ambient air. The high vacuum seasoning of PVP's surface showed improved performance from non-seasoning TFT; a $V_{th}$, a ${\mu}_{fe}$ and a interface charge trap density from -8V, $0.018cm^2V^{-1}s^{-1}$, $1.12{\times}10^{-12}(cm^2eV)^{-1}$ to -4.02 V, $0.021cm^2V^{-1}s^{-1}$, $6.62{\times}10^{-11}(cm^2eV)^{-1}$. These results of OTFT device show that polar components were well eliminated by the high vacuum seasoning processes.

• 한국전자파학회논문지
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• 제26권4호
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• pp.424-434
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• 2015

위상배열 레이더 시스템에서 간섭과 재밍을 제거하기 위하여 적응빔 형성 알고리즘이 폭넓게 사용되고 있다. 최근에 와서 FPGA 기술의 발전으로 적응빔 형성 알고리즘의 실시간 처리가 가능하게 되었다. 본 논문에서는 능동위상배열 레이더를 개발하기 위해 전단신호처리기에 적용한 적응빔 형성기의 FPGA 기반 실시간 구현방법을 제안하였다. 개방형 VPX 벡플레인을 통한 통신의 상용 FPGA 보드를 활용하여 콤팩트한 적응빔 형성기를 개발하였다. 이 적응빔 형성기는 역행렬을 구하기 위해 QR 분해와 역 치환을 포함한 수많은 고속의 복소 신호처리와 벡터 및 행렬 연산으로 구성하였다. 구현 결과, FPGA를 통한 적응빔 형성 결과와 매트랩을 통한 시뮬레이션 결과가 일치함을 보였다. 또한, FPGA를 통한 적응빔 형성 알고리즘의 실시간 처리가 가능하여 능동위상배열 레이더 시스템에 적용 가능함을 확인하였다.

• 한국정보처리학회논문지
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• 제4권2호
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• pp.499-514
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• 1997

본 논문에서는 다양한 이기종 망간의 상호 연동을 통한 개방형정보통신서비스를 제공하기 위해 게이트웨이시스(Gateway System)으로 개발되고 있는 대용량 통신처리 시스템의 내부 고속 연동망의 구조를 제시한다. 주요제원으로는 32*32 입출력 체널의 공유버스 스위칭 대역폭은은 640MBPS로써 평형상태에서 각 채널별 약 20Mbps 정도의 대연폭 할당이 가능하여 전화망 뿐만 아니라 고속의 ISDN 및 인터네트 서비스 연동이 가능하다. 고속 연동망은 주된 스위칭 기능을 담당하는 중재교환부, 각 입출력 채널을 구성하는 가입자 입출력부, 이들 상호 연결하는 백플레인버스로 구성이 되고, 신뢰성 향상기 위하여 부하 분담 방식의 이중화 구성이 가능하다.또한망정합모들의 구현을 용이케 하고 연동망 프로토콜을 처리하는 부하를 감소하기 위해 고속 연동망 프로토콜을 전담 처리 가입자노드 어댑터를 개발하였다.

• ETRI Journal
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• 제41권1호
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• pp.23-31
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• 2019

Since the late 20th century, there has been rapid development in the display industry. Only 30 years ago, we used big cathode ray tube displays with poor resolution, but now most people use televisions or smartphones with very high-quality displays. People now want images that are more realistic, beyond the two-dimensional images that exist on the flat screen, and digital holography-one of the next-generation displaysis expected to meet that need. The most important parameter that determines the performance of a digital hologram is the pixel pitch. The smaller the pixel pitch, the higher the level of hologram implementation possible. In this study, we fabricated the world-smallest $3-{\mu}m$-pixel-pitch holographic backplane based on the spatial light modulator technology. This panel could display images with a viewing angle of more than $10^{\circ}$. Furthermore, a comparative study was conducted on the fabrication processes and the corresponding holographic results from the large to the small pixel-pitch panels.

• 천문학논총
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• 제21권2호
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• pp.67-74
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• 2006

We have developed a control electronics system for an infrared detector array of KASINICS (KASI Near Infrared Camera System), which is a new ground-based instrument of the Korea Astronomy and Space science Institute (KASI). Equipped with a $512{\times}512$ InSb array (ALADDIN III Quadrant, manufactured by Raytheon) sensitive from 1 to $5{\mu}m$, KASINICS will be used at J, H, Ks, and L-bands. The controller consists of DSP(Digital Signal Processor), Bias, Clock, and Video boards which are installed on a single VME-bus backplane. TMS320C6713DSP, FPGA(Field Programmable Gate Array), and 384-MB SDRAM(Synchronous Dynamic Random Access Memory) are included in the DSP board. DSP board manages entire electronics system, generates digital clock patterns and communicates with a PC using USB 2.0 interface. The clock patterns are downloaded from a PC and stored on the FPGA. UART is used for the communication with peripherals. Video board has 4 channel ADC which converts video signal into 16-bit digital numbers. Two video boards are installed on the controller for ALADDIN array. The Bias board provides 16 dc bias voltages and the Clock board has 15 clock channels. We have also coded a DSP firmware and a test version of control software in C-language. The controller is flexible enough to operate a wide range of IR array and CCD. Operational tests of the controller have been successfully finished using a test ROIC (Read-Out Integrated Circuit).

• 한국진공학회:학술대회논문집
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• 한국진공학회 2012년도 제43회 하계 정기 학술대회 초록집
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• pp.154-155
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• 2012

The promise of nano-crystalites (nc) as a technological material, for applications including display backplane, and solar cells, may ultimately depend on tailoring their behavior through doping and crystallinity. Impurities can strongly modify electronic and optical properties of bulk and nc semiconductors. Highly doped dopant also effect structural properties (both grain size, crystal fraction) of nc-Si thin film. As discussed in several literatures, P atoms or radicals have the tendency to reside on the surface of nc. The P-radical segregation on the nano-grain surfaces that called self-purification may reduce the possibility of new nucleation because of the five-coordination of P. In addition, the P doping levels of ${\sim}2{\times}10^{21}\;at/cm^3$ is the solubility limitation of P in Si; the solubility of nc thin film should be smaller. Therefore, the non-activated P tends to segregate on the grain boundaries and the surface of nc. These mechanisms could prevent new nucleation on the existing grain surface. Therefore, most researches shown that highly doped nc-thin film by using conventional PECVD deposition system tended to have low crystallinity, where the formation energy of nucleation should be higher than the nc surface in the intrinsic materials. If the deposition technology that can make highly doped and simultaneously highly crystallized nc at low temperature, it can lead processes of next generation flexible devices. Recently, we are developing a novel CVD technology with a neutral particle beam (NPB) source, named as neutral beam assisted CVD (NBaCVD), which controls the energy of incident neutral particles in the range of 1~300eV in order to enhance the atomic activation and crystalline of thin films at low temperatures. During the formation of the nc-/pm-Si thin films by the NBaCVD with various process conditions, NPB energy directly controlled by the reflector bias and effectively increased crystal fraction (~80%) by uniformly distributed nc grains with 3~10 nm size. In the case of phosphorous doped Si thin films, the doping efficiency also increased as increasing the reflector bias (i.e. increasing NPB energy). At 330V of reflector bias, activation energy of the doped nc-Si thin film reduced as low as 0.001 eV. This means dopants are fully occupied as substitutional site, even though the Si thin film has nano-sized grain structure. And activated dopant concentration is recorded as high as up to 1020 #/$cm^3$ at very low process temperature (＜ $80^{\circ}C$) process without any post annealing. Theoretical solubility for the higher dopant concentration in Si thin film for order of 1020 #/$cm^3$ can be done only high temperature process or post annealing over $650^{\circ}C$. In general, as decreasing the grain size, the dopant binding energy increases as ratio of 1 of diameter of grain and the dopant hardly be activated. The highly doped nc-Si thin film by low-temperature NBaCVD process had smaller average grain size under 10 nm (measured by GIWAXS, GISAXS and TEM analysis), but achieved very higher activation of phosphorous dopant; NB energy sufficiently transports its energy to doping and crystallization even though without supplying additional thermal energy. TEM image shows that incubation layer does not formed between nc-Si film and SiO2 under later and highly crystallized nc-Si film is constructed with uniformly distributed nano-grains in polymorphous tissues. The nucleation should be start at the first layer on the SiO2 later, but it hardly growth to be cone-shaped micro-size grains. The nc-grain evenly embedded pm-Si thin film can be formatted by competition of the nucleation and the crystal growing, which depend on the NPB energies. In the evaluation of the light soaking degradation of photoconductivity, while conventional intrinsic and n-type doped a-Si thin films appeared typical degradation of photoconductivity, all of the nc-Si thin films processed by the NBaCVD show only a few % of degradation of it. From FTIR and RAMAN spectra, the energetic hydrogen NB atoms passivate nano-grain boundaries during the NBaCVD process because of the high diffusivity and chemical potential of hydrogen atoms.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2008년도 International Meeting on Information Display
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• pp.107-108
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• 2008

The spectacular development of AMLCDs, been made possible by a-Si:H technology, still faces two major drawbacks due to the intrinsic structure of a-Si:H, namely a low mobility and most important a shift of the transfer characteristics of the TFTs when submitted to bias stress. This has lead to strong research in the crystallization of a-Si:H films by laser and furnace annealing to produce polycrystalline silicon TFTs. While these devices show improved mobility and stability, they suffer from uniformity over large areas and increased cost. In the last decade we have focused on microcrystalline silicon (${\mu}c$-Si:H) for bottom gate TFTs, which can hopefully meet all the requirements for mass production of large area AMOLED displays [1,2]. In this presentation we will focus on the transfer of a deposition process based on the use of $SiF_4$-Ar-$H_2$ mixtures from a small area research laboratory reactor into an industrial gen 1 AKT reactor. We will first discuss on the optimization of the process conditions leading to fully crystallized films without any amorphous incubation layer, suitable for bottom gate TFTS, as well as on the use of plasma diagnostics to increase the deposition rate up to 0.5 nm/s [3]. The use of silicon nanocrystals appears as an elegant way to circumvent the opposite requirements of a high deposition rate and a fully crystallized interface [4]. The optimized process conditions are transferred to large area substrates in an industrial environment, on which some process adjustment was required to reproduce the material properties achieved in the laboratory scale reactor. For optimized process conditions, the homogeneity of the optical and electronic properties of the ${\mu}c$-Si:H films deposited on $300{\times}400\;mm$ substrates was checked by a set of complementary techniques. Spectroscopic ellipsometry, Raman spectroscopy, dark conductivity, time resolved microwave conductivity and hydrogen evolution measurements allowed demonstrating an excellent homogeneity in the structure and transport properties of the films. On the basis of these results, optimized process conditions were applied to TFTs, for which both bottom gate and top gate structures were studied aiming to achieve characteristics suitable for driving AMOLED displays. Results on the homogeneity of the TFT characteristics over the large area substrates and stability will be presented, as well as their application as a backplane for an AMOLED display.