• Journal of Communications and Networks
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• v.17 no.3
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• pp.286-295
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• 2015

Avionic databuses fulfill a critical function in the connection and communication of aircraft components and functions such as flight-control, navigation, and monitoring. Ethernet-based avionic databuses have become the mainstream for large aircraft owning to their advantages of full-duplex communication with high bandwidth, low latency, low packet-loss, and low cost. As a new generation aviation network communication standard, avionics full-duplex switched ethernet (AFDX) adopted concepts from the telecom standard, asynchronous transfer mode (ATM). In this technology, the switches are the key devices influencing the overall performance. This paper reviews the avionic databus with emphasis on the switch architecture classifications. Based on a comparison, analysis, and discussion of the different switch architectures, we propose a new avionic switch design based on a time-division switch fabric for high flexibility and scalability. This also merges the design concept of space-partition switch fabric to achieve reliability and predictability. The new switch architecture, called space partitioned shared memory switch (SPSMS), isolates the memory space for each output port. This can reduce the competition for resources and avoid conflicts, decrease the packet forwarding latency through the switch, and reduce the packet loss rate. A simulation of the architecture with optimized network engineering tools (OPNET) confirms the efficiency and significant performance improvement over a classic shared memory switch, in terms of overall packet latency, queuing delay, and queue size.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.46 no.2
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• pp.89-96
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• 2009

As increasing the number of digital control devices installed on aircrafts and their transmission speed, various digital data buses have been introduced to provide reliable and high-speed characteristics. These characteristics of avionics data bus are highly related on the fault-tolerant performance which can make minimize jitter and loss during data transfer. In this paper, we concerned about a new traffic shaping scheme for increasing the reliability of Avionics Full Duplex Switched Ethernet (AFDX) systems based on ARINC 664 standard. We note that the conventional AFDX with a single regulator per virtual link system may produce aggregated traffics as the number of virtual links increasing. The aggregated traffic results in large jitters among frames. To remedy for the jitter and loss of data, we propose a dual regulator scheme for the AFDX system. The purpose of the additional regulator is to additionally regulate aggregated traffics from a number of per virtual link regulators. Using NS-2 simulator, we show that the proposed scheme provides a better performance than the single regulator one. It is worthwhile note that the proposed AFDX with Dual Regulator scheme can be employed to not only aircraft networks but other QoS sensitive networks for robot and industrial control systems.

• Journal of the Korea Institute of Military Science and Technology
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• v.17 no.4
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• pp.436-447
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• 2014

The major elements of avionics system architecture are requirements, Real Time Operating System, message communication, memory, and data format etc. Herein describes a state-of-the-art development trend for the avionics system architecture, system requirements and data bus among the major elements of avionics system. While, domestic technology has been tried to Integrated Modular Avionics(IMA) system based on the Avionics Full Duplex Switched Ethernet(AFDX) technology during Light Attack Helicopter(LAH) project in Korea, but not yet proved as the product case in Full Scale Development Phase. The avionics system architecture considering the domestic inexperience of the IMA system architecture are suggested for the Next-generation Corps Unmanned Aircraft System.