• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.6
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• pp.802-809
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• 2014

This paper presents a dual-mode bias modulator (BM) for complementary metal oxide semiconductor (CMOS) power amplifiers (PAs). The BM includes a hybrid buck converter and a normal buck converter for an envelope tracking (ET) mode for high output power and for an average power tracking (APT) mode for low output power, respectively. The dual-mode BM and CMOS PA are designed using a $0.18-{\mu}m$ CMOS process for the 1.75 GHz band. For the 16-QAM LTE signal with a peak-to-average power ratio of 7.3 dB and a bandwidth of 5 MHz, the PA with the ET mode exhibited a poweradded efficiency (PAE) of 39.2%, an EVM of 4.8%, a gain of 19.0 dB, and an adjacent channel leakage power ratio of -30 dBc at an average output power of 22 dBm, while the stand-alone PA has a PAE of 8% lower at the same condition. The PA with APT mode has a PAE of 21.3%, which is an improvement of 13.4% from that of the stand-alone PA at an output power of 13 dBm.

• Journal of Multimedia Information System
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• v.7 no.3
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• pp.231-238
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• 2020

This work presents a fully analog baseline wander tracking and removal circuitry using high-pass filter (HPF) based R-peak detection and quadratic interpolation that does not require digital post processing, thus suitable for compact and low power long-term ECG monitoring devices. The proposed method can effectively track and remove baseline wander in ECG waveforms corrupted by various motion artifacts, whereas minimizing the loss of essential features including the QRS-Complex. The key component for tracking the baseline wander is down sampling the moving average of the corrupted ECG waveform followed by quadratic interpolation, where the R-peak samples that distort the baseline tracking are excluded from the moving average by using a HPF based approach. The proposed circuit is designed using CMOS 0.18-㎛ technology (1.8V supply) with power consumption of 19.1 ㎼ and estimated area of 15.5 ㎟ using a 4^th order HPF and quadratic interpolation. Results show SNR improvement of 10 dB after removing the baseline wander from the corrupted ECG waveform.

• Journal of electromagnetic engineering and science
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• v.14 no.1
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• pp.1-8
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• 2014

A differential-cascode CMOS power amplifier (PA) with a supply modulator for envelope tracking (ET) has been implemented by 0.18 ${\mu}m$ RF CMOS technology. The loss at the output is minimized by implementing the output transformer on a FR-4 printed circuit board (PCB). The CMOS PA utilizes the $2^{nd}$ harmonic short at the input to enhance the linearity. The measurement was done by the 10MHz bandwidth 16QAM 6.88 dB peak-to-average power ratio long-term evolution (LTE) signal at 1.85 GHz. The ET operation of the CMOS PA with the supply modulator enhances the power-added efficiency (PAE) by 2.5, to 10% over the stand-alone CMOS PA for the LTE signal. The ET PA achieves a PAE of 36.5% and an $ACLR_{E-UTRA}$ of -32.7 dBc at an average output power of 27 dBm.

• Journal of Power System Engineering
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• v.6 no.4
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• pp.43-48
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• 2002

This paper presents a seam tracking controller of high speed rotating arc sensor developed by microprocessor based system. The seam tracking algorithm is based on the average current value at each interval region of four phase points on one rotating cycle. To remove the noise effect for the measured current, the area during one rotating cycle is separated into four regions of front, rear, left and right. The average values at each region are calculated, using the regional current values and a low pass filter incorporating the moving average and exponential smoothing methods is adopted. The effectiveness is proven through the experimental results for several kinds of welding condition.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.9
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• pp.39-48
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• 2009

Human face tracking has gradually become an important issue in applications for portable multimedia devices such as digital camcorder, digital still camera and cell phone. Current embedded face tracking software implementations lack the processing abilities to track faces in real time mobile video processing. In this paper, we propose a power efficient hardware-based face tracking architecture operating in real time. The proposed system was verified by FPGA prototyping and ASIC implementation using Samsung 65nm CMOS process. The implementation result shows that tracking speed is less than 8.4 msec with 150K gates and 20 mW average power consumption. Consequently it is validated that the proposed system is adequate for portable multimedia device.

• Journal of electromagnetic engineering and science
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• v.15 no.2
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• pp.63-75
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• 2015

The CMOS power amplifier (PA) is a promising solution for highly-integrated transmitters in a single chip. However, the implementation of PAs using the CMOS process is a major challenge because of the inferior characteristics of CMOS devices. This paper focuses on improvements to the efficiency and linearity of CMOS PAs for modern wireless communication systems incorporating high peak-to-average ratio signals. Additionally, an envelope tracking supply modulator is applied to the CMOS PA for further performance improvement. The first approach is enhancing the efficiency by waveform engineering. In the second approach, linearization using adaptive bias circuit and harmonic control for wideband signals is performed. In the third approach, a CMOS PA with dynamic auxiliary circuits is employed in an optimized envelope tracking (ET) operation. Using the proposed techniques, a fully integrated CMOS ET PA achieves competitive performance, suitable for employment in a real system.

• Journal of Power Electronics
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• v.17 no.5
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• pp.1338-1348
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• 2017

In this study, a modified ripple correlation control (RCC) maximum-power point-tracking (MPPT) algorithm is proposed for a single-stage single-phase voltage source inverter (VSI) on a grid-connected photovoltaic system (GCPVS). Unlike classic RCC methods, the proposed algorithm does not require high-pass and low-pass filters or the increment of the AC component filter function in the voltage control loop. A simple arithmetic mean function is used to calculate the average value of the photovoltaic (PV) voltage, PV power, and PV voltage ripples for the MPPT of the RCC method. Furthermore, a high-accuracy and high-precision MPPT is achieved. The performance of the proposed algorithm for the single-stage single-phase VSI GCPVS is investigated through simulation and experimental results.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.11 no.8
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• pp.2951-2957
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• 2010

In solar industry the development of tracking PV power generation devices progresses favorably because of its efficiency, comparing with fixed PV power generation devices. Tracking PV power generation device are not only preserving the amount of solar radiation per unit area but also maximizing the efficiency of solar battery. Therefore accurate and low-priced solar position tracking devices are very important to improve the economical efficiency and lower invest price. This research is concerned with solar position algorithm with uncertainties equal to 1 minute($0.016^{\circ}$) using the mathmatics and astronomg. Proposed algorithm in this paper, lowers the implementation price and improves power generation efficiency. In view of the result so far achieved, maximum error has 30 secend($0.008^{\circ}$). And the solar cell generating system applied by this algorithm showed the gain of the fixed type contrast average 23W(about 18%).

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.19 no.8
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• pp.807-813
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• 2008

The gate-biases of the Doherty power amplifier are controlled to improve the linearity performance. The linearity improvement mechanism of the Doherty amplifier is the harmonic cancellation of the carrier and peaking amplifier at the output power combining point. However, it is difficult to cancel the harmonic power for the broader power range because the condition for cancelling is varied by power. For the linearity improvement, we have explored the linearity characteristic of the Doherty amplifier according to the input power and gate biases of the carrier and peaking amplifier. To extend the region of harmonic power cancellation, we have injected the proper gate bias to the carrier and peaking amplifier according to the input power levels. To validate the linearity improvement, the Doherty amplifier is designed using Eudyna 10-W PEP GaN HEMT EGN010MKs at 2.345 GHz and optimized to achieve a high linearity and efficiency at an average output power of 33 dBm, backed off about 10 dB from the $P_{1dB}$. In the experiments, the envelope tracking Doherty amplifier delivers a significantly improved adjacent channel leakage ratio performance of -37.4 dBc, which is an enhancement of about 2.8 dB, maintaining the high PAE of about 26 % for the WCDMA 1-FA signal at an average output power of 33 dBm. For the 802.16-2004 signal, the amplifier is also improved by about 2 dB, -35 dB.

• Journal of Electrical Engineering and Technology
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• v.10 no.1
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• pp.355-363
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• 2015

HVDC technology has become popular as an economic mode of bulk power transmission over very long distances. Polymeric insulators in HVDC power transmission lines are affected by surface tracking and erosion problems due to contamination deposit, which pose a greater challenge in maintaining the reliability of the HVDC system. In addition, polymeric insulators are also naturally affected by aging due to various environmental stresses, which in turn accelerates the surface tracking and erosion problems. Research works towards the improvement of tracking and erosion resistance of polymeric insulators by adding nano-sized fillers in the base material are being carried out worldwide. However, surface tracking and erosion performance of nano-filled aged polymeric insulators for HVDC applications are not well reported. Hence, in the present work, tracking and erosion resistance of the nano $Al(OH)_3$ filled silicone rubber insulation material has been evaluated under DC voltages at different filler concentrations and aged conditions, as per IEC 60587 test procedures. Leakage current and contact angle measurements were carried out to understand the surface hydrophobicity. Moving average technique was used to analyze the trend followed by leakage current. Water aged specimen shows less tracking resistance when compared with thermal aged specimen. It is observed that nano-filler concentration of 5% is even sufficient to get better tracking/erosion resistance under DC voltages.