• Title/Summary/Keyword: avalanche

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GLOBAL AVALANCHE CRITREION FOR THE S-BOXES OF SEED

  • Rhee, Min-Surp;Kim, Wan-Soon;Kim, Yang-Su
    • Journal of applied mathematics & informatics
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    • v.9 no.1
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    • pp.303-310
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    • 2002
  • The cyryptographic strength of a Feistel cipher depends strongly on the properties of its S-boxes, which are the strict avalanche criterion(SAC), the propagation criterion(PC) and GAC(the global avalanche criterion). In this paper global avalanche characteristics of S-boxes of the SEED are in-vestigated and compared to global avalanche characteristics of S-boxes of S-boxes of the Data Encryption Standard(DES).

Avalanche and Bit Independence Properties of Photon-counting Double Random Phase Encoding in Gyrator Domain

  • Lee, Jieun;Sultana, Nishat;Yi, Faliu;Moon, Inkyu
    • Current Optics and Photonics
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    • v.2 no.4
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    • pp.368-377
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    • 2018
  • In this paper, we evaluate cryptographic properties of a double random phase encoding (DRPE) scheme in the discrete Gyrator domain with avalanche and bit independence criterions. DRPE in the discrete Gyrator domain is reported to have higher security than traditional DRPE in the Fourier domain because the rotation angle involved in the Gyrator transform is viewed as additional secret keys. However, our numerical experimental results demonstrate that the DRPE in the discrete Gyrator domain has an excellent bit independence feature but does not possess a good avalanche effect property and hence needs to be improved to satisfy with acceptable avalanche effect that would be robust against statistical-based cryptanalysis. We compare our results with the avalanche and bit independence criterion (BIC) performances of the conventional DRPE scheme, and improve the avalanche effect of DRPE in the discrete Gyrator domain by integrating a photon counting imaging technique. Although the Gyrator transform-based image cryptosystem has been studied, to the best of our knowledge, this is the first report on a cryptographic evaluation of discrete Gyrator transform with avalanche and bit independence criterions.

Avalanche Phenomenon at The Ultra Shallow $N^+$-P Silicon Junctions (극히 얕은 $N^+$-P 실리콘 접합에서의 어발런치 현상)

  • Lee, Jung-Yong
    • Journal of the Semiconductor & Display Technology
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    • v.6 no.3
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    • pp.47-53
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    • 2007
  • Ultra thin Si p-n junctions shallower than $300{\AA}$ were fabricated and biased to the avalanche regime. The ultra thin junctions were fabricated to be parallel to the surface and exposed to the surface without $SiO_2$ layer. Those junctions emitted white light and electrons when junctions were biased in the avalanche breakdown regime. Therefore, we could observe the avalanche breakdown region visually. We could also observe the influence of electric field to the current flow visually by observing the white light which correspond to the avalanche breakdown region. Arrayed diodes emit light and electrons uniformly at the diode area. But, the reverse leakage current were larger than those of ordinary diodes, and the breakdown voltage were less than 10V.

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GLOBAL AVALANCHE CRITERION FOR THE S-BOXES OF DES

  • Kim, Wan-Soon;Kim, Yang-Su;Rhee, Min-Surp
    • The Pure and Applied Mathematics
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    • v.8 no.2
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    • pp.163-174
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    • 2001
  • In this paper we modify two indicators related to the global avalanche criterion (GAC) and discuss their properties. Also, we apply the modified indicators to measure the GAC of S-boxes of DES.

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Characteristics of the Avalanche Injection on SiO2Layer in MOS Structures (MOS 구조에서의 Avalanche Injection에 관한 연구)

  • 성영권;김성진;백우현;박찬원
    • The Transactions of the Korean Institute of Electrical Engineers
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    • v.34 no.6
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    • pp.244-252
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    • 1985
  • A model is presented to explain charging phenomena into the oxide layer when a metal-oxide-silicon(MOS) capacitor is driven by a large amplitude and high frequency ac signal sufficient to produce avalanche injection in the silicon. During avalanche, minority carriers are injected. It is assumed that some of these minority carriers attain sufficient energy to surmount the potential barrier at the interface, and then inter the oxide. Measurements of C-V curves are made for the MOS capacitor with p-type silicon substrates before and after avalanche injection. This paper studies how charging in the oxide and the interface depends on oxide properties. It is concluded that this charging effect is related to the presence of water in the oxide.

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Fault Tolerant Cryptography Circuit for Data Transmission Errors (데이터 전송 오류에 대한 고장 극복 암호회로)

  • You, Young-Gap;Park, Rae-Hyeon;Ahn, Young-Il;Kim, Han-Byeo-Ri
    • The Journal of the Korea Contents Association
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    • v.8 no.10
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    • pp.37-44
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    • 2008
  • This paper presented a solution to encryption and decryption problem suffering data transmission error for encrypted message transmission. Block cypher algorithms experience avalanche effect that a single bit error in an encrypted message brings substantial error bits after decryption. The proposed fault tolerant scheme addresses this error avalanche effect exploiting a multi-dimensional data array shuffling process and an error correction code. The shuffling process is to simplify the error correction. The shuffling disperses error bits to many data arrays so that each n-bit data block may comprises only one error bit. Thereby, the error correction scheme can easily restore the one bit error in an n-bit data block. This scheme can be extended on larger data blocks.

Short Channel n-MOSFET의 Breakdown 전압

  • Kim, Gwang-Su;Lee, Jin-Hyo
    • ETRI Journal
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    • v.9 no.1
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    • pp.118-124
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    • 1987
  • Short channel n-MOSFET의 드레인-소오스 사이의 breakdown은 단순한 접합 breakdown이 아닌 avalanche-induced breakdown으로 p-MOSFET, long channel n-MOSFET의 breakdown 전압보다 훨씬 작은 값을 갖는다. Short channel n-MOSFET의 breakdown의 특징은 current-controlled 부저항 특성(snapback)이 나타나고, 게이트 전압에 따라 breakdown 전압보다 작은 sustainning 전압이 존재한다. 이와 같은 sustainning 전압은 short channel n-MOSFET의 안정한 동작에 또 하나의 제한 요소가 될 수 있다. 따라서 공정 및 회로 시뮬레이션을 위해, short channel n-MOSFET의 avalanche breakdown 현상에 대한 정확한 분석이 요구된다. Short channel n -MOSFET의 avalanche breakdown 현상을 분석하기 위해서Parasitic bipolar transistor를 도입한 분석적 모델을 이용하였다.

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6.25-Gb/s Optical Receiver Using A CMOS-Compatible Si Avalanche Photodetector

  • Kang, Hyo-Soon;Lee, Myung-Jae;Choi, Woo-Young
    • Journal of the Optical Society of Korea
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    • v.12 no.4
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    • pp.217-220
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    • 2008
  • An optical receiver using a CMOS-compatible avalanche photodetector (CMOS-APD) is demonstrated. The CMOS-APD is fabricated with $0.18{\mu}m$ standard CMOS technology and the optical receiver is implemented by using the CMOS-APD and a transimpedance amplifier on a board. The optical receiver can detect 6.25-Gb/s data with the help of the series inductive peaking effect.

ON NONLINEARITY AND GLOBAL AVALANCHE CHARACTERISTICS OF VECTOR BOOLEAN FUNCTIONS

  • Kim, Wan-Soon;Hwang, Hee-Sung
    • Journal of applied mathematics & informatics
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    • v.16 no.1_2
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    • pp.407-417
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    • 2004
  • It is well known that the nonlinearity of vector Boolean functions F on n-dimensional vector space $GF(2)^n$ to $GF(2)^m$ is bounded above by $2^{n-1} - 2 ^{\frac{n}{2}-1}$. In this paper we derive upper bounds and a lower bound on the nonlinearity of vector Boolean functions in terms of auto-correlations. Strengths and weaknesses of each bounds are examined. Also, we modify the notions of the sum-of-square indicator and absolute indicator for Boolean functions to the case of vector Boolean functions to measure global avalanche characteristics of vector Boolean functions. Using those indicators we compare the global avalanche characteristics of DES (Data Encryption System) and Rijndael.

Performance Comparison of Two Types of Silicon Avalanche Photodetectors Based on N-well/P-substrate and P+/N-well Junctions Fabricated With Standard CMOS Technology

  • Lee, Myung-Jae;Choi, Woo-Young
    • Journal of the Optical Society of Korea
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    • v.15 no.1
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    • pp.1-3
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    • 2011
  • We characterize and analyze silicon avalanche photodetectors (APDs) fabricated with standard complementary metal-oxide-semiconductor (CMOS) technology. Current characteristics, responsivity, avalanche gain, and photodetection bandwidth of CMOS-APDs based on two types of PN junctions, N-well/P-substrate and $P^+$/N-well junctions, are compared and analyzed. It is demonstrated that the CMOS-APD using the $P^+$/N-well junction has higher responsivity as well as higher photodetection bandwidth than N-well/P-substrate. In addition, the important factors influencing CMOS-APD performance are clarified from this investigation.