• 한국진공학회:학술대회논문집
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• 한국진공학회 2016년도 제50회 동계 정기학술대회 초록집
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• pp.222.2-222.2
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• 2016

트랜지스터 응용 등에 관한 연구가 활발해 지면서 에너지 밴드갭이 0 eV에 가까운 그래핀 이외의 밴드 갭 조절이 가능한 MoS2 (molybdenum disulfide), BN (boron nitride), Bi2Te3 (bismuth telluride), WS2 (tungsten disulfide) 등과 같은 이차원 Transition Metal DiChalcogenides (TMDC) 물질이 반도체 물질로 각광받고 있다. 특히 MoS2의 경우 단결정 덩어리 상태에서는 약 1.3 eV의 밴드갭을 가지나 두께가 줄어들어 두 층일 경우에는 약 1.65 eV, 단일층이 되면 약 1.9 eV의 밴드갭을 가져 박막 층수에 따라 에너지 밴드갭 조절이 가능한 것으로 알려져있다. 하지만 두께 조절이 가능하면서 대면적, 고품질을 가지는 MoS2 박막 합성은 아직 제한적이라 할 수 있으며 새로운 방법 및 물질에 대한 연구가 지속적으로 이루어 지고 있다. 따라서 본 연구에서는 다양한 층수를 지니는 MoS2 합성을 위해 나노 두께의 MoS2 박막을 CF4 plasma 를 이용하여 layer etching 진행하고 CF4 plasma 100초 etching 진행한 2 layer 두께의 MoS2를 기준으로 H2S plasma를 이용하여 treatment 진행하였다. 물리적, 화학적 분석은 Raman spectroscopy, XPS(X-ray Photoelectron Spectroscopy), AFM (Atomic Force Microscopy) 등을 이용해 진행하였고 이를 통해 MoS2 layer 감소 및 damage recovery 등을 확인하였다.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2016년도 제50회 동계 정기학술대회 초록집
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• pp.274-274
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• 2016

터치스크린패널로 응용하기 위하여 80%이상의 높은 투과도와 낮은 저항이 요구된다. 그 중에서도 무반사 효과 (anti-reflective, AR) 를 크게하여 투과도를 향상시키는 방법으로 나노구조물, 증착시 경사각, 다층박막 방법 등이 연구 개발되고 있다. 단일 박막을 이용하여 무반사 코팅을 하는 경우, 정밀한 굴절률 조절이 어려우며 낮은 반사율 영역의 선폭이 좁은 단점이 있다. 반면, 저/고굴절률 다층박막의 경우 비교적 굴절률 조절이 용이하고 가시광영역 전반적으로 높은 투과도를 가질 수 있다. plasma enhanced chemical vapor deposition (PECVD) 증착법을 이용하여 무반사 효과를 증대시키기 위해 저/고굴절률 다층구조의 박막을 두께조합에 따라 평가하였으며, 가장 널리 사용되고 있는 Sputtering증착법과 비교하여 연구하였다. 제작된 다층박막의 구조는 glass(sub.)/SiN/SiO2/ITO 이며, 무반사 코팅층인 SiN/SiO2층은 각각 PECVD와 Sputtering 증착법을 통해 성장되었고, ITO는 스퍼터링 증착법을 이용하여 동일하게 성장하였다. 그 결과 PECVD 증착법이 Sputtering 증착법에 비하여 가시광영역(400~800nm)에서 더 높은 투과도를 얻게 되었다. 결과의 차이에 대해서 PECVD 증착법과 Sputtering 증착법으로 성장된 SiN, SiO2 박막의 광학적 특성과 물리적 특성의 변화를 spectroscopic ellipsometry (SE), Rutherford backscattering (RBS), atomic force microscopy (AFM) 을 이용하여 비교, 분석하였다.

• Membrane and Water Treatment
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• 제9권6호
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• pp.473-480
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• 2018

The effect of three iron-based adsorbents pre-depositing on ultrafiltration membrane for humic acid (HA) removal and membrane fouling was investigated. The result showed that pre-depositing adsorbents on membrane could not only reduce membrane fouling but also enhance HA removal. The flux was related to the adsorbent dosage and the optimal dosage for pre-deposition was $35.0g/m^2$. The dissolved organic carbon (DOC) removal of HA was 38.3%, 67.3% and 41.1% respectively when pre-deposited $35.0g/m^2$ $FeO_xH_y$, $MnFe_2O_4$ and $Fe_3O_4$ on membrane. Different adsorption effect of adsorbents on HA contributed to increasing of the flux at different level. Zeta potential of three adsorbents all decreased after adsorbed HA. The adsorption capacity of the three adsorbents was $FeO_xH_y$ > $MnFe_2O_4$ > $Fe_3O_4$. Atomic Force Microscopy (AFM) measurement showed the thickness of pre-deposition layers formed by different adsorbents was different. The scanning electron microscope (SEM) detection showed the morphology and compactness of pre-deposition layers formed by different adsorbents was different.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2004년도 Asia Display / IMID 04
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• pp.766-768
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• 2004

Rubbed films of a series of poly(p-phenylene 3,6-bis(4-(n-alkyloxy)phenyloxy)pyromellitimide)s (Cn-PMDA-PDA PIs), which are well-defined brush PIs composed of two aromatic-aliphatic bristles per repeat unit of a fully rodlike backbone, were investigated in detail using atomic force microscopy (AFM), optical retardation analysis and linearly polarized infrared (IR) spectroscopy in order to elucidate their surface morphology and molecular orientation. The liquid crystal (LC) alignment behavior and the anchoring energy of LC molecules on the rubbed films were also determined.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 하계학술대회 논문집
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• pp.140-140
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• 2009

The Metal-ferroelectric-semiconductor (MFS) structure has superior advantages such as high density integration and non-destructive read-out operation. However, to obtain the desired electrical characteristics of an MFS structure is difficult because of interfacial reactions between ferroelectric thin film and Si substrate. As an alternative solution, the MFS structure with buffer insulating layer, i.e. metal-ferroelectric-insulator-semiconductor (MFIS), has been proposed to improve the interfacial properties. Insulators investigated as a buffer insulator in a MFIS structure, include $Ta_2O_5$, $HfO_2$, and $ZrO_2$ which are mainly high-k dielectrics. In this study, we prepared the Dy-doped $La_2O_3$ solution buffer layer as an insulator. To form a Dy-doped $La_2O_3$ buffer layer, the solution was spin-coated on p-type Si(100) wafer. The coated Dy-doped $La_2O_3$ films were annealed at various temperatures by rapid thermal annealing (RTA). To evaluate electrical properties, Au electrodes were thermally evaporated onto the surface of the samples. Finally, we observed the surface morphology and crystallization quality of the Dy-doped $La_2O_3$ on Si using atomic force microscopy (AFM) and x-ray diffractometer (XRD), respectively. To evaluate electrical properties, the capacitance-voltage (C-V) and current density-voltage (J-V) characteristics of Au/Dy-doped La2O3/Si structure were measured.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 하계학술대회 논문집
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• pp.80-80
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• 2009

Recently, multiferroics have attracted much attention due to their numorous potentials. In this work, we attemped to utilize the multiferroics as an alternative material for ferroelectrics. Ferroelectric materials have been stadied to ferroelectric random access memories, however, some inevitable problems prevent it from inplementation. multiferroics shows a ferroelectricity and has low process temperature $BiFeO_3$(BFO) films have good ferroelectric properties but poor leakage characterization. Thus we tried, in this work, to adopt $HfO_2$ insulating layer for metal-ferroelectric-insulator-semiconductor(MFMIS) structure to surpress to leakage current. $BiFeO_3$(BFO) thin films were fabricared by using a sol-gel method on $HfO_2/Si$ structure. Ferroelectric BFO films on a p-type Si(100)wafer with a $HfO_2$ buffer layer have been fabricated to form a metal-ferroelectric-insulator-semiconductor (MFIS) structure. The $HfO_2$ insulator were deposited by using a sol-gel method. Then, they were carried out a rapid thermal annealing(RTA) furnace at $750\;^{\circ}C$ for 10 min in $N_2$. BFO films on the $HfO_2/Si$ structures were deposited by sol-gel method and they were crystallized rapid thermal annealing in $N_2$ atomsphere at $550\;^{\circ}C$ for 5 min. They were characterized by atomic force microscopy(AFM) and Capacitance-voltage(C-V) curve.

• 한국진공학회지
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• 제13권1호
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• pp.9-13
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• 2004

본 연구에서는 P 형과 N 형의 특성을 모두 갖추 것으로 알려진 perylene의 특성을 연구하였다. 특히 구조적 특성과 전기적 특성 향상을 위하여 초고진공 상태에서 $SiO_2$ 기판 위에 perylene 박막을 제작하였는데 증착 속도에 따른 박막의 특성 향상 여부를 살펴보기 위하여 0.1 $\AA$/s 와 1 $\AA$/s로 변화시켜가며 박막을 제작하였다. 박막의 결정성과 표면 특성은 X-선 회절과 원자 간력 현미경을 이용하여 살펴보았는데, 1 $\AA$/s로 증착된 perylene박막이 더 우수한 결정성과 표면 분포를 보였다. 박막의 전기적 특성 확인을 위하여 heavily doped 실리콘 기판 위에 $SiO_2$와 gold를 이용한 perylene 박막 트랜지스터를 제작하였다. 얻어진 perylene 박막 트랜지스터는 P 형의 반도체적 성질을 나타내었으며, 전류-전압 특성 곡선을 이용하여 $2.23\times10^{-5}\textrm{cm}^2$/Vs 의 전하 이동도를 얻었다.

• 전기화학회지
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• 제7권3호
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• pp.148-154
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• 2004

Nonactin을 이온 운반물질(ionophore)로, poly(vinyl chloride) (PVC) 또는 polyurethane (PU)을 지지체로, 그리고 bis(2-ethylhexyl)adipate을 가소제로 사용하여 제작한 암모늄이온 선택성전극의 성능을 비교한다. PU-전극의 검출한계를 PVC전극에 비해 더 낮게 제작할 수 있는 것을 제외하고는 PVC전극이 PU전극에 비하여 그 성능이 우수하였으며 이를 설명하기 위하여 AFM 형상과 임피던스 측정 등을 하였다. PU-전극이 PVC에 비하여 이온 이동에 대한 저항이 더 큰 것으로 보아 더 단단한 막을 형성하여 더 낮은 검출 한계를 가지며 수명이 긴 전극으로 발전시킬 수 있을 것으로 보인다.

• 한국수소및신에너지학회논문집
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• 제28권1호
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• pp.63-69
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• 2017

In this work, two different platinum (Pt) counter electrodes have been prepared by spin coating a Pt solution and screen printing a Pt paste on fluorine doped tin oxide (FTO) glass substrate followed by sintering at $380^{\circ}C$ for 30 min. Linear sweep voltammetry (LSV) and electrochemical impedance spectroscopy (EIS) analyses of the Pt electrodes showed that the spin coated electrode was catalytically more active than the screen printed electrode. The above result agrees well with the surface morphology of the electrodes studied by atomic force microscopy (AFM) and the photovoltaic performance of the dye-sensitized solar cells (DSSCs) fabricated with the Pt electrodes. Moreover, calculation of current density-voltage (j-V) curves according to diode model with the parameters obtained from the experimental j-V curves and the EIS data of the DSSCs provided a quantitative insight about how the catalytic activity of the counter electrodes affected the photovoltaic performance of the cells. Even though the experimental situations involved in this work are trivial, the method of analyses outlined here gives a strong insight about how the catalytic activity of a counter electrode affects the photovoltaic performance of a DSSC. This work, also, demonstrates how the photovoltaic performance of DSSCs can be improved by tuning the performance of counter electrode materials.

• Tribology and Lubricants
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• 제32권2호
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• pp.67-71
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• 2016

This study investigates the characteristics of the sapphire wafer chemical mechanical polishing (CMP) process. The material removal rate is one of the most important factors since it has a significant impact on the production efficiency of a sapphire wafer. Some of the factors affecting the material removal rate include the pressure, platen speed and slurry. Among the factors affecting the CMP process, we analyzed the trends in the material removal rate and surface roughness, which are mechanical factors corresponding to both the pressure and platen speed, were analyzed. We also analyzed the increase in the material removal rate, which is proportional to the pressure and platen speed, using the Preston equation. In the experiment, after polishing a 4-inch sapphire wafer with increasing pressure and platen speed, we confirmed the material removal rate via thickness measurements. Further, surface roughness measurements of the sapphire wafer were performed using atomic force microscopy (AFM) equipment. Using the measurement results, we analyzed the trends in the surface roughness with the increase in material removal rate. In addition, the experimental results, confirmed that the material removal rate increases in proportion to the pressure and platen speed. However, the results showed no association between the material removal rate and surface roughness. The surface roughness after the CMP process showed a largely consistent trend. This study demonstrates the possibility to improve the production efficiency of sapphire wafer while maintaining stable quality via mechanical factors associated with the CMP process.