• Title/Summary/Keyword: asynchronous interface

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A study on Web mortification distance education system design that not authentication in multimedia based (멀티미디어 기반에서의 Web을 통한 인증 없는 원격교육시스템 설계에 관한 연구)

  • Lee, Young-Joo;Lee, Sung-Chang
    • Journal of the Institute of Electronics Engineers of Korea TE
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    • v.42 no.1
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    • pp.69-76
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    • 2005
  • The most important issue in a asynchronous distance education system for multimedia surrounding is depend on the design of user interface that decide the interaction and easily using. The remarkable properties of this asynchronous distance education system that differed from traditional system are three folds: 1)it maded by using realistic metaphoe multimediately. 2)it designed interactively that students can get feed-back effect immediately. 3)it designed considered in its Performaces aspects and it based principal design of interfaces of education technology.

Implementation of a B-Link Interface Logic for a SCI Interconnect (SCI 연결망의 B-Link 인터페이스 회로 구현)

  • 한종석;모상만;기안도;한우종
    • Proceedings of the IEEK Conference
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    • 1999.11a
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    • pp.412-415
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    • 1999
  • In this paper, we describe an implementation of the B-Link bus interface logic for a directory controller and a remote access cash controller in the SCI-based CC-NUMA multimedia server developed by ETRI . The CC-NUMA multimedia server is composed of a number of Pentium III SHV nodes and a SCI interconnection network. To communicate with remote nodes, each node has a CC-Agent which consists of a processor bus interface(PIF). a directory controller(DC), a remote access cash controller(RC), and two SCI 1ink controllers(LCs). The B-Link bus interface logic is developed for a directory controller and a remote access cash controller in order to communicate with a SCI link controller on a B-Link bus. It consists of a sending master controller a receiving slave controller, and asynchronous data buffers. And It performs a self-arbitration, a data packet transmission, a queue allocation, an early terminal ion. and a cut-through data path.

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A Fault-Tolerant Linear System Solver in a Standard MPI Environment (표준 MPI 환경에서의 무정지형 선형 시스템 해법)

  • Park, Pil-Seong
    • Journal of Internet Computing and Services
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    • v.6 no.6
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    • pp.23-34
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    • 2005
  • In a large scale parallel computation, failures of some nodes or communication links end up with waste of computing resources, Several fault-tolerant MPI libraries have been proposed so far, but the programs written by using such libraries have a portability problem since fault-tolerant features are not supported by the MPI standard yet, In this paper, we propose an application-level fault-tolerant linear system solver that uses the asynchronous iteration algorithm and the standard MPI functions only, which does not have a portability problem and is more efficient by adopting a simplified recovery mechanism.

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A Digital Data Transmission Unit using Asynchronous Protocol for Power Transmission line

  • Nishiyama, Eiji;Kuwanami, Kenshi;Kitajima, Hiroyuki;Kawano, Mitsunori
    • 제어로봇시스템학회:학술대회논문집
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    • 2002.10a
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    • pp.79.6-79
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    • 2002
  • We propose here sequential 2 methods for obtain information of current or potential data for power transmission line. One is a digital data transmission unit, this is, an output of a current sensor of power transmission line is digitalized by use of an easy asynchronous protocol. The unit has high speed transform rate, easy making header caused of consisting of only logic circuit. The other is, the output of the unit is transformed via LAN interface and displayed on a personal computer. We have confirmed remote measuring using the method for 100A and 240 A of the current information of power transmission line. Therefore we will be able to see a current waveform by use of internet at a cheep c...

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Design of Asynchronous System Bus Wrappers based on a Hybrid Ternary Data Encoding Scheme (하이브리드 터너리 데이터 인코딩 기반의 비동기식 시스템 버스 래퍼 설계)

  • Lim, Young-Il;Lee, Je-Hoon;Lee, Seung-Sook;Cho, Kyoung-Rok
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.44 no.1
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    • pp.36-44
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    • 2007
  • This paper presented a hybrid ternary encoding scheme using 3-valued logic. It can adapt to the delay-insensitive(DI) model. We designed an asynchronous wrapper for the hybrid ternary encoding scheme to communicate with various asynchronous encoding schemes. It reduced about 50% of transmission lines and power consumption compared with the conventional 1-of-4 and ternary encoding scheme. The proposed wrappers were designed and simulated using the $0.18-{\mu}m$ standard CMOS technology. As a result, the asynchronous wrapper operated over 2 GHz communicating with a system bus. Moreover, the power dissipation of the system bus adapted the hybrid ternary encoding logic decreases 65%, 43%, and 36% of the dual-rail, 1-of-4, and ternary encoding scheme, respectively. The proposed data encoding scheme and the wrapper circuit can be useful for asynchronous high-speed and low-power asynchronous interface.

Implementation of Adaptive Multi Rate (AMR) Vocoder for the Asynchronous IMT-2000 Mobile ASIC (IMT-2000 비동기식 단말기용 ASIC을 위한 적응형 다중 비트율 (AMR) 보코더의 구현)

  • 변경진;최민석;한민수;김경수
    • The Journal of the Acoustical Society of Korea
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    • v.20 no.1
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    • pp.56-61
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    • 2001
  • This paper presents the real-time implementation of an AMR (Adaptive Multi Rate) vocoder which is included in the asynchronous International Mobile Telecommunication (IMT)-2000 mobile ASIC. The implemented AMR vocoder is a multi-rate coder with 8 modes operating at bit rates from 12.2kbps down to 4.75kbps. Not only the encoder and the decoder as basic functions of the vocoder are implemented, but VAD (Voice Activity Detection), SCR (Source Controlled Rate) operation and frame structuring blocks for the system interface are also implemented in this vocoder. The DSP for AMR vocoder implementation is a 16bit fixed-point DSP which is based on the TeakLite core and consists of memory block, serial interface block, register files for the parallel interface with CPU, and interrupt control logic. Through the implementation, we reduce the maximum operating complexity to 24MIPS by efficiently managing the memory structure. The AMR vocoder is verified throughout all the test vectors provided by 3GPP, and stable operation in the real-time testing board is also proved.

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A Study Mode of Synchronous & Asynchronous for Multimedia Distance Education System (동기 및 비동기 겸용모드의 멀티미디어 원격교육 시스템 개발에 관한 연구)

  • Kim, Sang-Jin;Kim, Seok-Soo;Park, Gil-Cheol;Hwang, Dae-Joon
    • The Transactions of the Korea Information Processing Society
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    • v.4 no.12
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    • pp.2985-2995
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    • 1997
  • In this paper, we proposed the "synchronous & asynchronous distance education system" which is able to interact among teachers and students for open education in cyberspace, and it is based telecommunication technology and multimedia technology. Specially, This system gets rid of the nufamiliarity and inconvenient feeling during the distance education. Also it supports the mediation of floor mode, for a group lecture and supports the synchronous mode for face-to-face effective and asynchronous mode for self-learning. The asynchronous mode has the down load function and the consultant mode (between teacher and student). The element technologies of this system consists of application sharing technique, whiteboard, various video window display, audio support, user interface, environment setup, session management, access control, network control and media control for collaborative distance education.

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A Study on the ATM Interface of Satellite TDMA Method for BISDN Services (BISDN 서비스를 위한 위성 TDMA 방법의 ATM 접속 기술 연구)

  • 홍완표;김정호;라극환
    • Journal of the Korean Professional Engineers Association
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    • v.30 no.1
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    • pp.125-136
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    • 1997
  • The satellite communications system application to the Broadband ISDN(BISDN) is now being studied. Asynchronous transfer mode(ATM) is the target for BISDN and makes it possible to offer multimedia services on the simple network structure. This paper clarifies the required functions to the ATM interface between the terrestrial network and satellite TDMA system to compensate cell delay variation caused by satellite link, to improve the transmission efficiency, to do usage parameter control and to configure TDMA/ATM hardware interface.

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Design of a High-Level Synthesis System Supporting Asynchronous Interfaces (비동기 인터페이스를 지원하는 정원 수준 합성 시스템의 설계)

  • 이형종;이종화;황선영
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.31A no.2
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    • pp.116-124
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    • 1994
  • This paper describes the design of a high-level synthesis system. ISyn: Interface Synthesis System for ISPS-A. which generates hardware satisfying timing constraints. The original version of ISPS is extended to be used for the description/capture of interface operations and timing constraints in the ISPS-A. To generate the schedule satisfying interface constraints the scheduling process is divided into two steps:pre-scheduling and post-scheduling. ISyn allocates hardware modules with I/O ports by the clique partitioning algorithm. Experimental results show that ISyn is capable of synthesizing hardware modules effectively for internal and/or interactive operations.

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Real-time distributed industrial process control system (실시간 분산 공정 제어 시스템)

  • 이도영;윤창진;전태웅
    • 제어로봇시스템학회:학술대회논문집
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    • 1986.10a
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    • pp.158-163
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    • 1986
  • This article surveys techniques and issues related to real time process control system developed for industrial control applications. It covers the system architecture and software engineering issues such as the design of data structures, scheduling of asynchronous task activities, management of shared resources, handling of interrupt and implementing an user friendly man-machine interface. Also problems associated with implementing a real-time system that supports dynamic configuration of data base is addressed.

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