• 전기학회논문지P
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• 제57권3호
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• pp.255-259
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• 2008

In this paper, a current-mode integrator for low-voltage, low-power analog integrated circuits is presented. Using the proposed current-mode integrator, the baseband analog filter is designed for WCDMA wireless communication. To verify the proposed current-mode integrator circuit, Hspice simulation using 1.8V TSMC $0.18{\mu}m$ CMOS parameter is performed and achieved 44.9dB gain, 15.7MHz unity gain frequency. The described 3rd-order current-mode baseband analog filter is composed of the proposed current-mode integrator, and SFG(Signal Flow Graph) method is used to realize the baseband filter. The simulated results show 2.12MHz cutoff frequency which is suitable for WCDMA baseband block.

• 전기학회논문지P
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• 제57권3호
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• pp.260-264
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• 2008

In this paper, a dual mode baseband analog channel selection filter is described which is designed for the Bluetooth and WCDMA wireless communications. Using the presented current-mode integrator, a dual mode channel selection filter is designed. To verify the current-mode integrator circuit, Hspice simulation using 1.8V Hynix $0.18{\mu}m$ standard CMOS technology was performed and achieved $50.0{\sim}4.3dB$ gain, $2.29{\sim}10.3MHz$ unity gain frequency. The described third-order dual mode analog channel selection filter is composed of the current-mode integrator, and used SFG(Signal Flow Graph) method. The simulated results show 0.51, 2.40MHz cutoff frequency which is suitable for the Bluetooth and WCDMA baseband block each.

• 한국통신학회:학술대회논문집
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• 한국통신학회 1983년도 추계학술발표회논문집
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• pp.32-34
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• 1983

In this paper, an analog optical filter link is evaluated for the transmission of baseband video signals over a single fiber. LED and PIN photo diode are used as the optical source and the detector. Frequency response of the system, DP, DG and SNR are measured.

• JSTS:Journal of Semiconductor Technology and Science
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• 제4권3호
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• pp.168-173
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• 2004

A low power CMOS receiver baseband analog circuit based on alternating filter and gain stage is reported. For the given specifications of the baseband analog block, optimum allocation of the gain, IIP3 and NF of the each block was performed to minimize current consumption. The fully integrated receiver BBA chain is fabricated in $0.18\;{\mu}m$ CMOS technology and IIP3 of 30 dBm with a gain of 55 dB and noise figure of 31 dB are obtained at 4.86 mW power consumption.

• JSTS:Journal of Semiconductor Technology and Science
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• 제11권4호
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• pp.309-317
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• 2011

This paper describes a baseband analog (BBA) chain for wireless local area network (WLAN) applications. For the given specifications of the receiver BBA chain, the optimum allocation of the gain and filter rejection of each block in a BBA chain is achieved to maximize the SFDR. The fully integrated BBA chain is fabricated in 0.13 ${\mu}m$ CMOS technology. An input-referred third-order intercept point (IIP3) of 22.9 dBm at a gain of 0.5 dB and an input-referred noise voltage (IRN) of 32.2 nV/${\surd}$Hz at a gain of 63.3 dB are obtained. By optimizing the allocation of the gain and filter rejection using the proposed design methodology, an excellent SFDR performance of 63.9 dB is achieved with a power consumption of 12 mW.

• ETRI Journal
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• 제26권5호
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• pp.486-492
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• 2004

The emergence of wide channel bandwidth wireless standards requires the use of a highly linear, wideband integrated CMOS baseband chain with moderate power consumption. In this paper, we present the design of highly linear, wideband active RC filters and a digitally programmable variable gain amplifier. To achieve a high unity gain bandwidth product with moderate power consumption, the feed-forward compensation technique is applied for the design of wideband active RC filters. Measured results from a $0.5{\mu}m$ CMOS prototype baseband chain show a cutoff frequency of 10 MHz, a variable gain range of 33 dB, an in-band IIP3 of 13 dBV, and an input referred noise of 114 ${\mu}Vrms$ while dissipating 20 mW from a 3 V supply.

• 한국정보통신학회:학술대회논문집
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• 한국해양정보통신학회 2005년도 추계종합학술대회
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• pp.1000-1002
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• 2005

최대 7기기까지의 슬레이브 디바이스들과 연결이 가능한 블루투스 피코넷에서, RF 연결단으로 송신되는 무선 데이터는 블루투스 버전 1.1 송신 규약에 적합하도록 1마이크로미터 단위로 슬라이싱되어 베이스밴드 입력단으로 들어오게 된다. 본 연구에서는 상대적으로 불안정한 RF 디바이스에서 베이스밴드로 전달되는 아날로그 신호를 1 마이크로미터 단위의 정확한 슬라이싱을 가능하게 해 주고, 또한 불안정한 아날로그에 대한 신호의 노이즈를 제거할 수 있는 디지털 로우패스 필터를 설계하였다. 설계된 디지털 로우패스필터는 블루투스 RF 일체형 베이스밴드 침의 절전 모드, 정상동작 모드와 고속 동작 모드인 12MHz, 24MHz, 48MHz 각 주파수에서 모두 정상적으로 동작하였다.

• Journal of Communications and Networks
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• 제5권4호
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• pp.374-385
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• 2003

The growing interest towards ultra-wideband (UWB) communications stems from its unique features such as baseband operation, ample multipath diversity, and the potential of enhanced user capacity. But since UWB has to overlay existing narrowband systems, multiple access has to be achieved in the presence of narrowband interference (NBI). However, existing baseband spreading codes for UWB multiple access are not flexible in handling NBI. In this paper, we introduce two novel spreading codes that not only enable baseband UWB multiple access, but also facilitate flexible NBI cancellation. We construct our codes using a single carrier or multiple carriers (SC or MC), which can be implemented with standard discrete-cosine transform (DCT) circuits. With our SC/MC codes, NBI can be avoided by simply nulling undesired digital carriers. Being digital, these SC/MC codes give rise to multiband UWB systems, without invoking analog carriers. In addition, our SC/MC codes enable full multipath diversity, and maximum coding gains. Equally attractive is their capability to reduce the number of interfering users, with simple matched filter operations. Comprehensive simulations are also carried out to corroborate our analysis.

• 전기학회논문지
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• 제63권1호
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• pp.85-91
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• 2014

As RFID is utilized more frequently and diversely in terms of its application areas, the application of mobile RFID technology, which integrates cellular networks and RFID, is highly anticipated. The growth and development of the RFID field has bolstered the development of mobile RFID chips to be embedded in mobile phones. Because mobile RFID chips are embedded in cell phones, limitations such as low power, small form factor, and costliness must be confronted. This study presents the design of a RFID digital baseband processor that is suitable for mobile readers. The RF analog component, which affects the baseband signals, is designed separately, in consideration of the limitations stated above. The function of the baseband processor was verified through simulations and prototyped using FPGA. The power consumption of the chip is 20mW under a 20MHz clock and the chip measures $3mm{\times}3mm$.

• 대한전자공학회논문지SD
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• 제40권2호
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• pp.111-116
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• 2003

본 논문에서는 CMOS로 구현된 무선 홈 네트워크용 Base-Band Analog 수신단을 제안하였다. 제안된 수신단은 길버트 셀 형태의 믹서, Gm-C 형태의 Elliptic 6차 저역통과 필터, 그리고 6-bit A/D 변환기로 구성되어 있다. 제안한 수신단은 CMOS RF 단을 거친 작은 전력의 200㎒의 아날로그 신호와 PLL에서 나오는 큰 전력의 199㎒ 국부 발진 신호가 믹서에 인가되어 Base Band 신호를 생성해 낸다 이 신호는 낮은 주파수로부터 높은 주파수가지 분포되어 있는데 저역통과 필터를 거쳐 1㎒의 Base-Band 신호만을 추출해낸다. 이 1㎒의 신호는 다시 6-bit A/D 변환기를 거쳐 6-bit 디지털 code를 생성하여 DSP(Digital Signal Processing) 블록과 연결된다. 제작된 수신단은 0.25㎛ 1-poly 5-metal n-well CMOS 공정으로 제작되었으므로 유효 칩 면적은 200㎛ × 1400㎛ 이고, 2.5V의 전원전압에서 130㎽ 전력 소모를 나타내었다.