• The Transactions of the Korean Institute of Electrical Engineers P
• /
• v.57 no.3
• /
• pp.255-259
• /
• 2008

In this paper, a current-mode integrator for low-voltage, low-power analog integrated circuits is presented. Using the proposed current-mode integrator, the baseband analog filter is designed for WCDMA wireless communication. To verify the proposed current-mode integrator circuit, Hspice simulation using 1.8V TSMC $0.18{\mu}m$ CMOS parameter is performed and achieved 44.9dB gain, 15.7MHz unity gain frequency. The described 3rd-order current-mode baseband analog filter is composed of the proposed current-mode integrator, and SFG(Signal Flow Graph) method is used to realize the baseband filter. The simulated results show 2.12MHz cutoff frequency which is suitable for WCDMA baseband block.

• The Transactions of the Korean Institute of Electrical Engineers P
• /
• v.57 no.3
• /
• pp.260-264
• /
• 2008

In this paper, a dual mode baseband analog channel selection filter is described which is designed for the Bluetooth and WCDMA wireless communications. Using the presented current-mode integrator, a dual mode channel selection filter is designed. To verify the current-mode integrator circuit, Hspice simulation using 1.8V Hynix $0.18{\mu}m$ standard CMOS technology was performed and achieved $50.0{\sim}4.3dB$ gain, $2.29{\sim}10.3MHz$ unity gain frequency. The described third-order dual mode analog channel selection filter is composed of the current-mode integrator, and used SFG(Signal Flow Graph) method. The simulated results show 0.51, 2.40MHz cutoff frequency which is suitable for the Bluetooth and WCDMA baseband block each.

• Proceedings of the Korean Institute of Communication Sciences Conference
• /
• 1983.10a
• /
• pp.32-34
• /
• 1983

In this paper, an analog optical filter link is evaluated for the transmission of baseband video signals over a single fiber. LED and PIN photo diode are used as the optical source and the detector. Frequency response of the system, DP, DG and SNR are measured.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.4 no.3
• /
• pp.168-173
• /
• 2004

A low power CMOS receiver baseband analog circuit based on alternating filter and gain stage is reported. For the given specifications of the baseband analog block, optimum allocation of the gain, IIP3 and NF of the each block was performed to minimize current consumption. The fully integrated receiver BBA chain is fabricated in $0.18\;{\mu}m$ CMOS technology and IIP3 of 30 dBm with a gain of 55 dB and noise figure of 31 dB are obtained at 4.86 mW power consumption.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.11 no.4
• /
• pp.309-317
• /
• 2011

This paper describes a baseband analog (BBA) chain for wireless local area network (WLAN) applications. For the given specifications of the receiver BBA chain, the optimum allocation of the gain and filter rejection of each block in a BBA chain is achieved to maximize the SFDR. The fully integrated BBA chain is fabricated in 0.13 ${\mu}m$ CMOS technology. An input-referred third-order intercept point (IIP3) of 22.9 dBm at a gain of 0.5 dB and an input-referred noise voltage (IRN) of 32.2 nV/${\surd}$Hz at a gain of 63.3 dB are obtained. By optimizing the allocation of the gain and filter rejection using the proposed design methodology, an excellent SFDR performance of 63.9 dB is achieved with a power consumption of 12 mW.

• ETRI Journal
• /
• v.26 no.5
• /
• pp.486-492
• /
• 2004

The emergence of wide channel bandwidth wireless standards requires the use of a highly linear, wideband integrated CMOS baseband chain with moderate power consumption. In this paper, we present the design of highly linear, wideband active RC filters and a digitally programmable variable gain amplifier. To achieve a high unity gain bandwidth product with moderate power consumption, the feed-forward compensation technique is applied for the design of wideband active RC filters. Measured results from a $0.5{\mu}m$ CMOS prototype baseband chain show a cutoff frequency of 10 MHz, a variable gain range of 33 dB, an in-band IIP3 of 13 dBV, and an input referred noise of 114 ${\mu}Vrms$ while dissipating 20 mW from a 3 V supply.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• v.9 no.2
• /
• pp.1000-1002
• /
• 2005

In the Bluetooth piconet in which up to 7 slave devices can be connected simultaneously at one network instance, the wireless data expected to be sent over to the RF interface should be sliced by the unit of 1 micrometer, which is a requirement in the specification of the Bluetooth version 1.1. In this contribution, we have designed a digital low-pass filter which is able to slice the unstable analog signal fed from the RF interface to the Baseband, by the uniform unit of 1 micrometer, and is also capable of removing the possible noise which can be caused by the analog circuit system. The low-pass filter operated well in the various modes of the Bluetooth RF embedded Baseband chip such as sleep mode, normal mode, and high-speed mode at 12MHz, 24MHz, and 48MHz respectively.

• Journal of Communications and Networks
• /
• v.5 no.4
• /
• pp.374-385
• /
• 2003

The growing interest towards ultra-wideband (UWB) communications stems from its unique features such as baseband operation, ample multipath diversity, and the potential of enhanced user capacity. But since UWB has to overlay existing narrowband systems, multiple access has to be achieved in the presence of narrowband interference (NBI). However, existing baseband spreading codes for UWB multiple access are not flexible in handling NBI. In this paper, we introduce two novel spreading codes that not only enable baseband UWB multiple access, but also facilitate flexible NBI cancellation. We construct our codes using a single carrier or multiple carriers (SC or MC), which can be implemented with standard discrete-cosine transform (DCT) circuits. With our SC/MC codes, NBI can be avoided by simply nulling undesired digital carriers. Being digital, these SC/MC codes give rise to multiband UWB systems, without invoking analog carriers. In addition, our SC/MC codes enable full multipath diversity, and maximum coding gains. Equally attractive is their capability to reduce the number of interfering users, with simple matched filter operations. Comprehensive simulations are also carried out to corroborate our analysis.

• The Transactions of The Korean Institute of Electrical Engineers
• /
• v.63 no.1
• /
• pp.85-91
• /
• 2014

As RFID is utilized more frequently and diversely in terms of its application areas, the application of mobile RFID technology, which integrates cellular networks and RFID, is highly anticipated. The growth and development of the RFID field has bolstered the development of mobile RFID chips to be embedded in mobile phones. Because mobile RFID chips are embedded in cell phones, limitations such as low power, small form factor, and costliness must be confronted. This study presents the design of a RFID digital baseband processor that is suitable for mobile readers. The RF analog component, which affects the baseband signals, is designed separately, in consideration of the limitations stated above. The function of the baseband processor was verified through simulations and prototyped using FPGA. The power consumption of the chip is 20mW under a 20MHz clock and the chip measures $3mm{\times}3mm$.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.40 no.2
• /
• pp.111-116
• /
• 2003

In this paper, a CMOS baseband analog receiver for wireless home network is discussed. It is composed of a Gilbert type mixer, an Elliptic 6th order 1ow pass filter, and a 6-bit A/D converter. The main role of the mixer is generating a mixed analog signal between the 200MHz output signal of CMOS RF stage and the 199MHz local oscillator. After the undesired high frequency component of the mixed signal comes out. Finally, the analog signal is converted into digital code at the 6-bit A/D converter, The proposed receiver is fabricated with 0.25${\mu}{\textrm}{m}$ 1-poly 5-metal CMOS technology, and the chip area is 200${\mu}{\textrm}{m}$ X1400${\mu}{\textrm}{m}$. the receiver consumes 130㎽ at 2.5V power supply.