• Title/Summary/Keyword: analog CMOS vision chips

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Design of Analog CMOS Vision Chip for Edge Detection with Low Power Consumption (저전력 아날로그 CMOS 윤곽검출 시각칩의 설계)

  • Kim, Jung-Hwan;Park, Jong-Ho;Suh, Sung-Ho;Lee, Min-Ho;Shin, Jang-Kyoo;Nam, Ki-Hong
    • Journal of Sensor Science and Technology
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    • v.12 no.6
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    • pp.231-240
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    • 2003
  • The problem of power consumption and the limitation of a chip area should be considered when the pixel number of the edge detection circuit increases to fabricate a vision chip for edge detection with high resolution. The numeric increment of the unit circuit causes power consumption to increase and require a larger chip area. An increment of power consumption and a limitation of chip area with several ten milli-meters square supplied by the CMOS foundry company restrict the pixel numbers of the edge detection circuit. In this paper, we proposed a electronic switch to minimize the power consumption owing to the numeric increment of the edge detection circuit to realize a vision chip for edge detection with high resolution. We also applied a method by which photodetector and edge detection circuit are separated to implement a vision chip with a higher resolution. The photodetector circuit with $128{\times}128$ pixels uses a common edge detection circuit with $1{\times}128$ pixels so that resolution was improved at the same chip area. The chip size is $4mm{\times}4mm$ and the power consumption was confirmed to be about 20mW using SPICE.