• Journal of the Institute of Electronics Engineers of Korea TC
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• v.43 no.12 s.354
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• pp.9-15
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• 2006

In this paper, signal processing techniques for noncoherent impulse-radio-based UWB (IR-UWB) communication system are proposed to provide system implementation of low power consumption and low complexity. The proposed system adopts a simple modulation technique of OOK (on-oft-keying) and noncoherent signal detection based on signal amplitude. In particular, a technique of a novel high speed digital sampler using a stable, lower reference clock is developed to detect nano-second pulses and recover digital signals from the pulses. Also, a 32 bits Turyn code for data frame synchronization and a convolution code as FEC are applied, respectively. To verify the proposed signal processing techniques for low power, low complexity noncoherent IR-UWB system, the proposed signal processing technique is implemented in FPGA and then a short-range communication system for wireless transmission of high quality MP3 data is designed and tested.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.18 no.1 s.116
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• pp.15-23
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• 2007

A simple six-port direct conversion QPSK receiver which is made up of a six-port phase correlator, a signal power detector, and I/Q channel signal de-modulator is designed and implemented in this paper. The output phase signals of six-port phase correlator are also analysed. On the basis of $90^{\circ}C$ phase relation among the six-port phase correlator output signals, the QPSK de-modulation circuit is designed by a simple circuit. The six-port phase correlator is made up of $90^{\circ}$ hybrid branch line and power detector. The six-port phase correlator, which is designed in frequency range of 11.7 to 12.0 GHz, gets the phase error characteristics less than $5^{\circ}$. By considering matching network and amplitude balance in the designed fiequency range, the designed six-port direct conversion QPSK receiver demodulates the I and Q signals with performance less than $5^{\circ}$ phase error.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.28 no.12A
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• pp.1009-1018
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• 2003

A new fading channel estimation technique is proposed for an OFDM based modem In the ITS system. The algorithm is based on the transfer function extraction of the channel using the pilot signals and compensated the channel preceding the equalization. The newly derived algorithm is division-free arithmetic operations allows the faster circuit operation and the smaller circuit size. Proposed techniques compensate firstly the distortion which is generated at fading channels and secondly eliminate inter-symbol interference. All algorithms are suitability estimated and improved for a system implementation using digital circuits. As the results, the circuit size is reduced by 20% of the conventional design and achieved about 10% performance improvement at low SNR under 10dB in case of ITS system adapted 16-QAM mode.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.22 no.10
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• pp.1379-1385
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• 2018

In the conventional multi-user superposition transmission, the power allocation coefficients of data symbols and the received signal processing of users are determined by the condition of instantaneous channel powers. However, the use of instantaneous channel powers can increase the system complexity. Hence, we consider fixed multi-user superposition transmission using average channel powers. The fixed multi-user superposition transmission can reduce the system complexity because it uses the condition of average channel powers that slowly change over time in order to decide the power allocation coefficients and the received signal processing. In this paper, we analyze the average symbol error rate for the fixed multi-user superposition transmission. In particular, an expression for the average symbol error rate of M-ary Quadrature Amplitude Modulation is derived assuming Rayleigh fading channels. In addition, through the numerical results, we show that the conventional and fixed multi-user superposition transmissions achieve the similar average symbol error rate performances at the user in the severe channel condition.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.23 no.6
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• pp.726-732
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• 2019

In this study, we proposed an asymmetric differential inductor to improve the linearity of differential power amplifiers. Considering the phase error between differential signals of the differential amplifier, the location of the center tap of the differential inductor was modified to minimize the error. As a result, the center tap was positioned asymmetrically inside the differential inductor. With the asymmetric differential inductor, the AM-to-AM and AM-to-PM distortions of the amplifier were suppressed. To confirm the feasibility of the inductor, we designed a 2.4 GHz differential CMOS PA for IEEE 802.11n WLAN applications with a 64-quadrature amplitude modulation (QAM), 9.6 dB peak-to-average power ratio (PAPR), and a bandwidth of 20 MHz. The designed power amplifier was fabricated using the 180-nm RF CMOS process. The measured maximum linear output power was 17 dBm, whereas EVM was 5%.

• Journal of Institute of Control, Robotics and Systems
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• v.22 no.9
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• pp.705-709
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• 2016

Micro-electro-mechanical systems (MEMS) gyroscopes are widely used in various robot applications. However, these conventional gyroscopes need to vibrate the proof mass using a built-in actuator at a fixed resonance frequency to sense the Coriolis force. When a robot is not moving, the meaningless vibration of the gyroscope wastes power. In addition, this continuous vibration makes the sensor vulnerable to external sound waves with a frequency close to the proof-mass resonance frequency. In this paper, a feasibility study of a new type of gyroscope inspired by insect halteres is presented. In dipterous insects, halteres are a biological gyroscope that measures the Coriolis force. Wing muscles and halteres are mechanically linked, and the halteres oscillate simultaneously with wing beats. The vibrating haltere experiences the Coriolis force if the insect is going through a rotational motion. Inspired by this haltere structure, a gyroscope using a thin mast integrated with a robot actuation mechanism is proposed. The mast vibrates only when the robot is moving without requiring a separate actuator. The Coriolis force of the mast can be measured with an accelerometer installed at the tip of the mast. However, the signal from the accelerometer has multiple frequency components and also can be highly corrupted with noise, such that raw data are not meaningful. This paper also presents a suitable signal processing technique using the amplitude modulation method. The feasibility of the proposed haltere-inspired gyroscope is also experimentally evaluated.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.19 no.3
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• pp.697-707
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• 2015

This paper covered the design and implementation of the demodulation receiver in the ADS-B 1090ES system, which is one of the CNS/ATM's surveillance systems. This researched demodulation performed at the level required by RTCA DO-268B and EUROCAE ED-129. The single signal process method, which applies a baseline multi-sample technique among multi-amplitude sample demodulations, was suggested to improve the quality of the receiver signal, the dynamic range and so on. The suggested multi-signal level tuning method has enhanced the single-signal process method, reducing the unstable reception ratio by the transmit output level difference and manufacturing receiver hardware. The result was that the receiver suggested by the method had 0~87dBm in dynamic range and -90dBm in MTL. This shows a better performance by -3dBm less than the international standard in ADS-B 1090ES ground receiver equipment. The systems which use a similar modulation method, will be considered to be widely applied.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.33 no.4A
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• pp.440-449
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• 2008

In this paper, we propose a 16-QAM carrier recovery loop which is suitable for the implementation of Inmarsat M4 system receiver. Because the frequency offset of ${\pm}924\;Hz$ on signal bandwidth 33.6 kHz is recommended in Inmarsat M4 system specification, carrier recovery loop having stable operation in the channel environment with large relative frequency offset is required. the carrier recovery loop which adopts only PLL can't be stable in relatively large frequency offset environment. Therefore, we propose a carrier recovery loop which has stable operation in large relative frequency offset environment for Inmarsat M4 system. The proposed carrier recovery loop employed differential filter-based noncoherent UW detector which is robust to frequency offset, CP-AFC for initial frequency offset acquisition using UW signal, and 16-QAM DD-PLL for phase tracking using data signal to overcome large relative frequency offset and achieve stable carrier recovery performance. Simulation results show that the proposed carrier recovery loop has stable operation and satisfactory performance in large relative frequency offset environment for Inmarsat M4 system.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.47 no.2
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• pp.9-17
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• 2010

Recently, there has been much interest in orthogonal frequency division multiplexing (OFDM) for next generation wireless wideband communication systems. OFDM is a special case of multicarrier transmission, where a single data stream is transmitted over a number of lower-rate subcarriers. One of the main reasons to use OFDM is to increase robustness against frequency-selective fading or narrowband interference. However, in the radio systems it is also important to distortion introduced by high power amplifiers (HPA's) such as solid state power amplifier (SSPA) considered in this paper. Since the signal amplitude of the OFDM system is Rayleigh-distributed, the performance of the OFDM system is significantly degraded by the nonlinearity of the HPA in the OFDM transmitter. In this paper, we propose a canonical piecewise-linear (PWL) model based digital predistorter to prevent signal distortion and spectral re-growth due to the high peak-to-average power ratio (PAPR) of OFDM signal and the nonlinearity of HPA's. Computer simulation on an OFDM system under additive white Gaussian noise (AWGN) channels with QPSK, 16-QAM and 64-QAM modulation schemes and modulator/demodulator implemented with 1024-point FFT/IFFT, demonstrate that the proposed predistorter achieves significant performance improvement by effectively compensating for the nonlinearity introduced by the SSPA.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.35C no.11
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• pp.21-30
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• 1998

In this paper, a digital current control system using a FPGA(Field Programmable Gate Array) was implemented, and the system was applied to an induction motor widely used as an industrial driving machine. The FPGA designed by VHDL(VHSIC Hardware Description Language) consists of a PWM(Pulse Width Modulation) generation block, a PWM protection block, a speed measuring block, a watch dog timer block, an interrupt control block, a decoder logic block, a wait control block and digital input and output blocks respectively. Dedicated clock inputs on the FPGA were used for high-speed execution, and an up-down counter and a latch block were designed in parallel, in order that the triangle wave could be operated at 40 MHz clock. When triangle wave is compared with many registers respectively, gate delay occurs from excessive fan-outs. To reduce the delay, two triangle wave registers were implemented in parallel. Amplitude and frequency of the triangle wave, and dead time of PWM could be changed by software. This FPGA was synthesized by pASIC 2SpDE and Synplify-Lite synthesis tool of Quick Logic company. The final simulation for worst cases was successfully performed under a Verilog HDL simulation environment. And the FPGA programmed for an 84 pin PLCC package was applied to digital current control system for 3-phase induction motor. The digital current control system of the 3 phase induction motor was configured using the DSP(TMS320C31-40 MHz), FPGA, A/D converter and Hall CT etc., and experimental results showed the effectiveness of the digital current control system.