• 제목/요약/키워드: amount of computation

검색결과 604건 처리시간 0.023초

GMDH를 이용한 비선형 시스템의 모델링 성능 개선 (Performance Improvement of Nonlinear System Modeling Using GMDH)

  • 홍연찬
    • 한국정보통신학회논문지
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    • 제14권7호
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    • pp.1544-1550
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    • 2010
  • 비선형 동적 시스템을 모델링하기 위해 GMDH(Group Method of Data Handling)를 적용한 많은 연구들이 수행되어 왔다. 그러나 모델링의 정확성을 위해서는 계산량이 크게 증가한다. 그러므로 본 논문에서는 입력 데이터를 취사선택하는 기준을 점감적으로 조정함으로써 적어도 정확성을 유지하면서 전형적인 GMDH의 단점인 과도한 계산을 피할 수 있는 방법을 제안한다. 컴퓨터 시뮬레이션 결과, GMDH 알고리듬의 계산량을 성공적으로 줄일 수 있었고 에러율도 소폭 줄일 수 있었다.

제산방법에 의한 Reed-Solomon 부호의 개선된 복호알고리듬 (Improved Decoding Algorithm on Reed-Solomon Codes using Division Method)

  • 정제홍;박진수
    • 전자공학회논문지A
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    • 제30A권11호
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    • pp.21-28
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    • 1993
  • Decoding algorithm of noncyclic Reed-Solomon codes consists of four steps which are to compute syndromes, to find error-location polynomial, to decide error-location, and to solve error-values. There is a decoding method by which the computation of both error-location polynomial and error-evaluator polynimial can be avoided in conventional decoding methods using Euclid algorithm. The disadvantage of this method is that the same amount of computation is needed that is equivalent to solve the avoided polynomial. This paper considers the division method on polynomial on GF(2$^{m}$) systematically. And proposes a novel method to find error correcting polynomial by simple mathematical expression without the same amount of computation to find the two avoided polynomial. Especially. proposes the method which the amount of computation to find F (x) from the division M(x) by x, (x-1),....(x--${\alpha}^{n-2}$) respectively can be avoided. By applying the simple expression to decoding procedure on RS codes, propses a new decoding algorithm, and to show the validity of presented method, computer simulation is performed.

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CELP 보코더에서 델타 피치 검색 방법 개선에 대한 연구 (An Algorithm to Reduce the Pitch Computational amount using Modified Delta Searching in CELP Vocoders)

  • 주상규
    • 한국산학기술학회:학술대회논문집
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    • 한국산학기술학회 2010년도 춘계학술발표논문집 1부
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    • pp.269-272
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    • 2010
  • In this paper, we propose the computation reduction methods of delta pitch search that is used in G.723.1 vocoder. In order to decrease the computational amount in delta pitch search the characteristic of proposed algorithms is as the following. First, scheme to reduce the computation amount in delta pitch search uses NAMDF. Developed the second scheme is the skipping technique of lags in pitch searching by using the threshold value. By doing so, we can reduce the computational amount of pitch searching more than 64% with negligible quality degradation.

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화자적응시스템을 위한 MLLR 알고리즘 연산량 감소 (Reduction of Dimension of HMM parameters in MLLR Framework for Speaker Adaptation)

  • 김지운;정재호
    • 대한음성학회:학술대회논문집
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    • 대한음성학회 2003년도 5월 학술대회지
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    • pp.123-126
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    • 2003
  • We discuss how to reduce the number of inverse matrix and its dimensions requested in MLLR framework for speaker adaptation. To find a smaller set of variables with less redundancy, we employ PCA(principal component analysis) and ICA(independent component analysis) that would give as good a representation as possible. The amount of additional computation when PCA or ICA is applied is as small as it can be disregarded. The dimension of HMM parameters is reduced to about 1/3 ~ 2/7 dimensions of SI(speaker independent) model parameter with which speech recognition system represents word recognition rate as much as ordinary MLLR framework. If dimension of SI model parameter is n, the amount of computation of inverse matrix in MLLR is proportioned to O($n^4$). So, compared with ordinary MLLR, the amount of total computation requested in speaker adaptation is reduced to about 1/80~1/150.

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실시간 적응형 Motion Estimation 알고리듬 및 구조 설계 (A Adaptive Motion Estimation Using Spatial correlation and Slope of Motion vector for Real Time Processing and Its Architecture)

  • 이준환;김재석
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2000년도 추계종합학술대회 논문집(4)
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    • pp.57-60
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    • 2000
  • This paper presents a new adaptive fast motion estimation algorithm along with its architecture. The conventional algorithm such as full - search algorithm, three step algorithm have some disadvantages which are related to the amount of computation, the quality of image and the implementation of hardware, the proposed algorithm uses spatial correlation and a slope of motion vector in order to reduce the amount of computation and preserve good image quality, The proposed algorithm is better than the conventional Block Matching Algorithm(BMA) with regard to the amount of computation and image quality. Also, we propose an efficient at chitecture to implement the proposed algorithm. It is suitable for real time processing application.

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디지털 펄스압축기의 연산 양 비교 (Comparison of Computation Complexity for Digital Pulse Compressor)

  • 신현익;김상규;조태훈;김환우
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2003년도 하계종합학술대회 논문집 Ⅳ
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    • pp.2196-2199
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    • 2003
  • With the development of digital signal processor(DSP), digital pulse compressor (DPC) is commonly used in radar systems. A DPC is implemented by using finite impulse response(FIR) filter algorithm in time domain or fast Fourier transform(FFT) algorithm in frequency domain. This paper compares the computation complexity tot these two methods and calculates boundary Fm filter taps that determine which of the two methods is better based on computation amount. Also, it shows that the boundary FIR filter taps for DSP, ADSP21060, and those for computation complexity have similar characteristic.

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대규모 AC/DC 전력 시스템 실시간 EMP 시뮬레이션의 부하 분산 연구 (Analysis of Distributed Computational Loads in Large-scale AC/DC Power System using Real-Time EMT Simulation)

  • 박인권;이종후;이장;구현근;권용한
    • KEPCO Journal on Electric Power and Energy
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    • 제8권2호
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    • pp.159-179
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    • 2022
  • Often a network becomes complex, and multiple entities would get in charge of managing part of the whole network. An example is a utility grid. While the entire grid would go under a single utility company's responsibility, the network is often split into multiple subsections. Subsequently, each subsection would be given as the responsibility area to the corresponding sub-organization in the utility company. The issue of how to make subsystems of adequate size and minimum number of interconnections between subsystems becomes more critical, especially in real-time simulations. Because the computation capability limit of a single computation unit, regardless of whether it is a high-speed conventional CPU core or an FPGA computational engine, it comes with a maximum limit that can be completed within a given amount of execution time. The issue becomes worsened in real time simulation, in which the computation needs to be in precise synchronization with the real-world clock. When the subject of the computation allows for a longer execution time, i.e., a larger time step size, a larger portion of the network can be put on a computation unit. This translates into a larger margin of the difference between the worst and the best. In other words, even though the worst (or the largest) computational burden is orders of magnitude larger than the best (or the smallest) computational burden, all the necessary computation can still be completed within the given amount of time. However, the requirement of real-time makes the margin much smaller. In other words, the difference between the worst and the best should be as small as possible in order to ensure the even distribution of the computational load. Besides, data exchange/communication is essential in parallel computation, affecting the overall performance. However, the exchange of data takes time. Therefore, the corresponding consideration needs to be with the computational load distribution among multiple calculation units. If it turns out in a satisfactory way, such distribution will raise the possibility of completing the necessary computation in a given amount of time, which might come down in the level of microsecond order. This paper presents an effective way to split a given electrical network, according to multiple criteria, for the purpose of distributing the entire computational load into a set of even (or close to even) sized computational loads. Based on the proposed system splitting method, heavy computation burdens of large-scale electrical networks can be distributed to multiple calculation units, such as an RTDS real time simulator, achieving either more efficient usage of the calculation units, a reduction of the necessary size of the simulation time step, or both.

모폴로지 연산에 사용되는 볼록 구조요소의 분해를 위한 알고리듬 (A Decomposition Algorithm for Convex Structuring Elements in Morphological Operation)

  • 온승엽
    • 한국시뮬레이션학회논문지
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    • 제13권1호
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    • pp.11-23
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    • 2004
  • The decomposition of a structuring element for a morphological operation reduces the amount of the computation required for executing the operation. In this paper, we present a new technique for the decomposition of convex structuring elements for morphological operations. We formulated the linear constraints for the decomposition of a convex polygon in discrete space, then the constraints are applied to the decomposition of a convex structuring element. Also, a cost function is introduced to represent the optimal criteria for decomposition. We use linear integer programming technique to find the combination of basis structuring elements which minimizes the amount of the computation required for executing the morphological operation. Formulating different cost functions for different implementation methods and computer architectures, we can determine the optimal decompositions which guarantee the minimal amounts of computation on different computing environment.

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Optimal Decomposition of Convex Structuring Elements on a Hexagonal Grid

  • Ohn, Syng-Yup
    • The Journal of the Acoustical Society of Korea
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    • 제18권3E호
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    • pp.37-43
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    • 1999
  • In this paper, we present a new technique for the optimal local decomposition of convex structuring elements on a hexagonal grid, which are used as templates for morphological image processing. Each basis structuring element in a local decomposition is a local convex structuring element, which can be contained in hexagonal window centered at the origin. Generally, local decomposition of a structuring element results in great savings in the processing time for computing morphological operations. First, we define a convex structuring element on a hexagonal grid and formulate the necessary and sufficient conditions to decompose a convex structuring element into the set of basis convex structuring elements. Further, a cost function was defined to represent the amount of computation or execution time required for performing dilations on different computing environments and by different implementation methods. Then the decomposition condition and the cost function are applied to find the optimal local decomposition of convex structuring elements, which guarantees the minimal amount of computation for morphological operation. Simulation shows that optimal local decomposition results in great reduction in the amount of computation for morphological operations. Our technique is general and flexible since different cost functions could be used to achieve optimal local decomposition for different computing environments and implementation methods.

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Computation and Communication Efficient Key Distribution Protocol for Secure Multicast Communication

  • Vijayakumar, P.;Bose, S.;Kannan, A.;Jegatha Deborah, L.
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • 제7권4호
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    • pp.878-894
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    • 2013
  • Secure multimedia multicast applications involve group communications where group membership requires secured dynamic key generation and updating operations. Such operations usually consume high computation time and therefore designing a key distribution protocol with reduced computation time is necessary for multicast applications. In this paper, we propose a new key distribution protocol that focuses on two aspects. The first one aims at the reduction of computation complexity by performing lesser numbers of multiplication operations using a ternary-tree approach during key updating. Moreover, it aims to optimize the number of multiplication operations by using the existing Karatsuba divide and conquer approach for fast multiplication. The second aspect aims at reducing the amount of information communicated to the group members during the update operations in the key content. The proposed algorithm has been evaluated based on computation and communication complexity and a comparative performance analysis of various key distribution protocols is provided. Moreover, it has been observed that the proposed algorithm reduces the computation and communication time significantly.